Writing area-efficient hardware descriptions for logic synthesis

Lloyd G. Clonts, Donald W. Bouldin

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Several advantages for using a hardware description language for logic synthesis are given along with some example programs. Variations in writing style are shown to have a significant effect on the optimization process used by the synthesizer since one style generally results in a physical layout that consumes only half that of another. Based on these experiences, a structured, object-oriented style that separates control and operations is recommended for the writing of area-efficient hardware descriptions.

Original languageEnglish
Title of host publicationConference Proceedings - IEEE SOUTHEASTCON
PublisherPubl by IEEE
Pages505-508
Number of pages4
ISBN (Print)0780304942
StatePublished - 1992
EventProceedings of the IEEE SOUTHEASTCON '92 - Birmingham, AL, USA
Duration: Apr 12 1992Apr 15 1992

Publication series

NameConference Proceedings - IEEE SOUTHEASTCON
Volume2
ISSN (Print)0734-7502

Conference

ConferenceProceedings of the IEEE SOUTHEASTCON '92
CityBirmingham, AL, USA
Period04/12/9204/15/92

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