Universally Applicable DC-Link RC Snubber Design Method for Switching Voltage Overshoot Reduction

This article proposes a new dc-link resistor-capacitor (RC) snubber design method that overcomes three challenges in the conventional eigenvalue-based design methods (i.e., not universally applicable for various parasitic circuit parameters, challenging to consider zeros in the design process, and requiring numerical iterations). The proposed dc-link RC snubber design method universally applies to systems with various parasitic circuit values (e.g., parasitic inductances and capacitances). The proposed design method uses a Bode plot instead of eigenvalues, inherently including the impact of zero on switching voltage overshoot in the design process. Considering both eigenvalues and zeros, enables the proposed design methods to yield dc-link RC snubbers with superior performance. The dc-link RC snubber values are given by closed-form expressions in the proposed design method, eliminating the need for numerical iterations. The experimental results from two cases with different parasitic circuit values show that the proposed design method yields dc-link RC snubber values with up to about 10% less switching voltage overshoot than the dc-link snubber values given by the state-of-the-art eigenvalue-based design method.