Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping

Zheming Jin; Jeffrey S. Vetter

doi:10.1109/IPDPSW59300.2023.00057

Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Towards the goal of improving functional and performance portability of SYCL, we study a bioinformatics application that has been accelerated with CUDA and fast pseudorandom number generation on a GPU. We describe the experience of migrating pseudorandom number generation from CUDA to SYCL, evaluate the performance of pseudorandom number generators using the CUDA random number generation library, suggest the support of the XORWOW pseudorandom number generator in the oneAPI math kernel library (oneMKL) interface for performance portability, and identify the performance gap using the MKL interface in SYCL that supports pseudorandom number generation with third-party libraries. We hope that the results are valuable for the development of the SYCL ecosystem.

Original language	English
Title of host publication	2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	295-298
Number of pages	4
ISBN (Electronic)	9798350311990
DOIs	https://doi.org/10.1109/IPDPSW59300.2023.00057
State	Published - 2023
Event	2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023 - St. Petersburg, United States Duration: May 15 2023 → May 19 2023

Publication series

Name	2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023

Conference

Conference	2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023
Country/Territory	United States
City	St. Petersburg
Period	05/15/23 → 05/19/23

Funding

We appreciate the reviewers' criticisms. The research used resources at the Experimental Computing Lab at Oak Ridge National Laboratory. This research was supported by the US Department of Energy Advanced Scientific Computing Research program under Contract No. DE-AC05-00OR22725 ACKNOWLEDGMENT We appreciate the reviewers’ criticisms. The research used resources at the Experimental Computing Lab at Oak Ridge National Laboratory. This research was supported by the US Department of Energy Advanced Scientific Computing Research program under Contract No. DE-AC05-00OR22725.

Funders	Funder number
US Department of Energy Advanced Scientific Computing Research	DE-AC05-00OR22725
Oak Ridge National Laboratory

Keywords

Bioinformatics
Portability
Programming model
Pseudorandom number generation

Access to Document

10.1109/IPDPSW59300.2023.00057

Cite this

Jin, Z., & Vetter, J. S. (2023). Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping. In 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023 (pp. 295-298). (2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPDPSW59300.2023.00057

Jin, Zheming ; Vetter, Jeffrey S. / Understanding SYCL Portability for Pseudorandom Number Generation : A Case Study with Gene-Expression Connectivity Mapping. 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023. Institute of Electrical and Electronics Engineers Inc., 2023. pp. 295-298 (2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023).

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abstract = "Towards the goal of improving functional and performance portability of SYCL, we study a bioinformatics application that has been accelerated with CUDA and fast pseudorandom number generation on a GPU. We describe the experience of migrating pseudorandom number generation from CUDA to SYCL, evaluate the performance of pseudorandom number generators using the CUDA random number generation library, suggest the support of the XORWOW pseudorandom number generator in the oneAPI math kernel library (oneMKL) interface for performance portability, and identify the performance gap using the MKL interface in SYCL that supports pseudorandom number generation with third-party libraries. We hope that the results are valuable for the development of the SYCL ecosystem.",

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language = "English",

series = "2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Jin, Z & Vetter, JS 2023, Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping. in 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023. 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023, Institute of Electrical and Electronics Engineers Inc., pp. 295-298, 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023, St. Petersburg, United States, 05/15/23. https://doi.org/10.1109/IPDPSW59300.2023.00057

Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping. / Jin, Zheming; Vetter, Jeffrey S.
2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023. Institute of Electrical and Electronics Engineers Inc., 2023. p. 295-298 (2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Jin Z, Vetter JS. Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping. In 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023. Institute of Electrical and Electronics Engineers Inc. 2023. p. 295-298. (2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023). doi: 10.1109/IPDPSW59300.2023.00057

Understanding SYCL Portability for Pseudorandom Number Generation: A Case Study with Gene-Expression Connectivity Mapping

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