Understanding Performance Interference in Next-Generation HPC Systems

Oscar H. Mondragon; Patrick G. Bridges; Scott Levy; Kurt B. Ferreira; Patrick Widener

doi:10.1109/SC.2016.32

Understanding Performance Interference in Next-Generation HPC Systems

Oscar H. Mondragon, Patrick G. Bridges, Scott Levy, Kurt B. Ferreira, Patrick Widener

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

26 Scopus citations

Abstract

Next-generation systems face a wide range of new potential sources of application interference, including resilience actions, system software adaptation, and in situ analytics programs. In this paper, we present a new model for analyzing the performance of bulk-synchronous HPC applications based on the use of extreme value theory. After validating this model against both synthetic and real applications, the paper then uses both simulation and modeling techniques to profile next-generation interference sources and characterize their behavior and performance impact on a selection of HPC benchmarks, mini-applications, and applications. Lastly, this work shows how the model can be used to understand how current interference mitigation techniques in multi-processors work.

Original language	English
Title of host publication	Proceedings of SC 2016
Subtitle of host publication	The International Conference for High Performance Computing, Networking, Storage and Analysis
Publisher	IEEE Computer Society
Pages	384-395
Number of pages	12
ISBN (Electronic)	9781467388153
DOIs	https://doi.org/10.1109/SC.2016.32
State	Published - Jul 2 2016
Externally published	Yes
Event	2016 International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2016 - Salt Lake City, United States Duration: Nov 13 2016 → Nov 18 2016

Publication series

Name	International Conference for High Performance Computing, Networking, Storage and Analysis, SC
Volume	0
ISSN (Print)	2167-4329
ISSN (Electronic)	2167-4337

Conference

Conference	2016 International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2016
Country/Territory	United States
City	Salt Lake City
Period	11/13/16 → 11/18/16

Access to Document

10.1109/SC.2016.32

Cite this

Mondragon, O. H., Bridges, P. G., Levy, S., Ferreira, K. B., & Widener, P. (2016). Understanding Performance Interference in Next-Generation HPC Systems. In Proceedings of SC 2016: The International Conference for High Performance Computing, Networking, Storage and Analysis (pp. 384-395). Article 7877111 (International Conference for High Performance Computing, Networking, Storage and Analysis, SC; Vol. 0). IEEE Computer Society. https://doi.org/10.1109/SC.2016.32

Mondragon, Oscar H. ; Bridges, Patrick G. ; Levy, Scott et al. / Understanding Performance Interference in Next-Generation HPC Systems. Proceedings of SC 2016: The International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society, 2016. pp. 384-395 (International Conference for High Performance Computing, Networking, Storage and Analysis, SC).

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title = "Understanding Performance Interference in Next-Generation HPC Systems",

abstract = "Next-generation systems face a wide range of new potential sources of application interference, including resilience actions, system software adaptation, and in situ analytics programs. In this paper, we present a new model for analyzing the performance of bulk-synchronous HPC applications based on the use of extreme value theory. After validating this model against both synthetic and real applications, the paper then uses both simulation and modeling techniques to profile next-generation interference sources and characterize their behavior and performance impact on a selection of HPC benchmarks, mini-applications, and applications. Lastly, this work shows how the model can be used to understand how current interference mitigation techniques in multi-processors work.",

author = "Mondragon, {Oscar H.} and Bridges, {Patrick G.} and Scott Levy and Ferreira, {Kurt B.} and Patrick Widener",

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year = "2016",

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doi = "10.1109/SC.2016.32",

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Mondragon, OH, Bridges, PG, Levy, S, Ferreira, KB & Widener, P 2016, Understanding Performance Interference in Next-Generation HPC Systems. in Proceedings of SC 2016: The International Conference for High Performance Computing, Networking, Storage and Analysis., 7877111, International Conference for High Performance Computing, Networking, Storage and Analysis, SC, vol. 0, IEEE Computer Society, pp. 384-395, 2016 International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2016, Salt Lake City, United States, 11/13/16. https://doi.org/10.1109/SC.2016.32

Understanding Performance Interference in Next-Generation HPC Systems. / Mondragon, Oscar H.; Bridges, Patrick G.; Levy, Scott et al.
Proceedings of SC 2016: The International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society, 2016. p. 384-395 7877111 (International Conference for High Performance Computing, Networking, Storage and Analysis, SC; Vol. 0).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Next-generation systems face a wide range of new potential sources of application interference, including resilience actions, system software adaptation, and in situ analytics programs. In this paper, we present a new model for analyzing the performance of bulk-synchronous HPC applications based on the use of extreme value theory. After validating this model against both synthetic and real applications, the paper then uses both simulation and modeling techniques to profile next-generation interference sources and characterize their behavior and performance impact on a selection of HPC benchmarks, mini-applications, and applications. Lastly, this work shows how the model can be used to understand how current interference mitigation techniques in multi-processors work.

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Mondragon OH, Bridges PG, Levy S, Ferreira KB, Widener P. Understanding Performance Interference in Next-Generation HPC Systems. In Proceedings of SC 2016: The International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society. 2016. p. 384-395. 7877111. (International Conference for High Performance Computing, Networking, Storage and Analysis, SC). doi: 10.1109/SC.2016.32

Understanding Performance Interference in Next-Generation HPC Systems

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