Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept

Fei Yang; Zhiqiang Jack Wang; Zheyu Zhang; Steven Campbell; Fred Wang; Madhu Chinthavali

doi:10.1109/APEC.2018.8341253

Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept

Fei Yang, Zhiqiang Jack Wang, Zheyu Zhang, Steven Campbell, Fred Wang, Madhu Chinthavali

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Scopus citations

Abstract

Middle-point inductance L_middle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying L_middle. Extensive switching tests are conducted to evaluate the device's switching performance at different values of L_middle. Experiment result shows that the active MOSFET's turn-on loss will decrease at higher values of L_middle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. In addition to switching loss variation, it is also observed that different voltage stresses are imposed on the active switch and anti-parallel diode. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of lower MOSFET increases as L_middle goes up; however, the peak voltage of anti-parallel diode decreases significantly. The analysis and experiment results will provide design guidelines for multiple-chip power module package design with P-cell/N-cell concept.

Original language	English
Title of host publication	APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1742-1749
Number of pages	8
ISBN (Electronic)	9781538611807
DOIs	https://doi.org/10.1109/APEC.2018.8341253
State	Published - Apr 18 2018
Event	33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 - San Antonio, United States Duration: Mar 4 2018 → Mar 8 2018

Publication series

Name	Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume	2018-March

Conference

Conference	33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018
Country/Territory	United States
City	San Antonio
Period	03/4/18 → 03/8/18

Funding

ACKNOWLEDGMENT This research was sponsored by the Electric Drive Technologies Program, DOE Vehicle Technologies Office, under contract DE-AC05-00OR22725 with UT-Battelle, LLC. This work made use of the Engineering Research Center Shared Facilities supported by the Engineering Research Center Program of the National Science Foundation and the Department of Energy under NSF Award Number EEC-1041877 and the CURENT Industry Partnership Program. This manuscript has been authored by UT-Battelle, LLC under Contract No. DE-AC05-00OR22725 with the U.S. Department of Energy. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a nonexclusive, paid-up, irrevocable, world-wide license to publish or reproduce the published form of this manuscript, or allow others to do so, for United States Government purposes. The Department of Energy will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (http://energy.gov/downloads/doe-public-access-plan).

Funders	Funder number
CURENT
LLC
National Science Foundation and the Department of Energy
UT-Battelle
National Science Foundation	EEC-1041877
U.S. Department of Energy
Vehicle Technologies Office	DE-AC05-00OR22725 with UT-Battelle

Keywords

Middle-point parasitic inductance
Multiple-chip in parallel
SiC power module
Split converter

Access to Document

10.1109/APEC.2018.8341253

Cite this

Yang, F., Wang, Z. J., Zhang, Z., Campbell, S., Wang, F., & Chinthavali, M. (2018). Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept. In APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition (pp. 1742-1749). (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2018-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APEC.2018.8341253

Yang, Fei ; Wang, Zhiqiang Jack ; Zhang, Zheyu et al. / Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept. APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 1742-1749 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

@inproceedings{aaf0f294748043be8020d5816a2a4895,

title = "Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept",

abstract = "Middle-point inductance Lmiddle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying Lmiddle. Extensive switching tests are conducted to evaluate the device's switching performance at different values of Lmiddle. Experiment result shows that the active MOSFET's turn-on loss will decrease at higher values of Lmiddle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. In addition to switching loss variation, it is also observed that different voltage stresses are imposed on the active switch and anti-parallel diode. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of lower MOSFET increases as Lmiddle goes up; however, the peak voltage of anti-parallel diode decreases significantly. The analysis and experiment results will provide design guidelines for multiple-chip power module package design with P-cell/N-cell concept.",

keywords = "Middle-point parasitic inductance, Multiple-chip in parallel, SiC power module, Split converter",

author = "Fei Yang and Wang, {Zhiqiang Jack} and Zheyu Zhang and Steven Campbell and Fred Wang and Madhu Chinthavali",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 ; Conference date: 04-03-2018 Through 08-03-2018",

year = "2018",

month = apr,

day = "18",

doi = "10.1109/APEC.2018.8341253",

language = "English",

series = "Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1742--1749",

booktitle = "APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition",

}

Yang, F, Wang, ZJ, Zhang, Z, Campbell, S, Wang, F & Chinthavali, M 2018, Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept. in APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, vol. 2018-March, Institute of Electrical and Electronics Engineers Inc., pp. 1742-1749, 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018, San Antonio, United States, 03/4/18. https://doi.org/10.1109/APEC.2018.8341253

Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept. / Yang, Fei; Wang, Zhiqiang Jack; Zhang, Zheyu et al.
APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1742-1749 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2018-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept

AU - Yang, Fei

AU - Wang, Zhiqiang Jack

AU - Zhang, Zheyu

AU - Campbell, Steven

AU - Wang, Fred

AU - Chinthavali, Madhu

PY - 2018/4/18

Y1 - 2018/4/18

N2 - Middle-point inductance Lmiddle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying Lmiddle. Extensive switching tests are conducted to evaluate the device's switching performance at different values of Lmiddle. Experiment result shows that the active MOSFET's turn-on loss will decrease at higher values of Lmiddle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. In addition to switching loss variation, it is also observed that different voltage stresses are imposed on the active switch and anti-parallel diode. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of lower MOSFET increases as Lmiddle goes up; however, the peak voltage of anti-parallel diode decreases significantly. The analysis and experiment results will provide design guidelines for multiple-chip power module package design with P-cell/N-cell concept.

AB - Middle-point inductance Lmiddle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying Lmiddle. Extensive switching tests are conducted to evaluate the device's switching performance at different values of Lmiddle. Experiment result shows that the active MOSFET's turn-on loss will decrease at higher values of Lmiddle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. In addition to switching loss variation, it is also observed that different voltage stresses are imposed on the active switch and anti-parallel diode. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of lower MOSFET increases as Lmiddle goes up; however, the peak voltage of anti-parallel diode decreases significantly. The analysis and experiment results will provide design guidelines for multiple-chip power module package design with P-cell/N-cell concept.

KW - Middle-point parasitic inductance

KW - Multiple-chip in parallel

KW - SiC power module

KW - Split converter

UR - http://www.scopus.com/inward/record.url?scp=85046967838&partnerID=8YFLogxK

U2 - 10.1109/APEC.2018.8341253

DO - 10.1109/APEC.2018.8341253

M3 - Conference contribution

AN - SCOPUS:85046967838

T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

SP - 1742

EP - 1749

BT - APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018

Y2 - 4 March 2018 through 8 March 2018

ER -

Yang F, Wang ZJ, Zhang Z, Campbell S, Wang F, Chinthavali M. Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept. In APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1742-1749. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC). doi: 10.1109/APEC.2018.8341253

Understanding middle-point inductance's effect on switching transients for multi-chip SiC package design with P-cell/N-cell concept

Abstract

Publication series

Conference

Funding

Keywords

Access to Document

Other files and links

Fingerprint

Cite this