Abstract
Conventional computing architectures encounter 'von Neumann' and 'memory wall' bottlenecks which arise due to the back-and-forth data movement between the physically separate memory and processing units and the speed mismatch between them, respectively. These bottlenecks hurt both energy efficiency and the throughput of computing systems. To address these challenges, in-memory computing architectures have emerged as a promising alternative. They reduce the need for frequent data movement by executing different computing tasks inside the memory system. Here, we present UltraLiM, a logic-in-memory architecture using the UltraRAM-based memory system. UltraRAM holds the promise of developing a 'universal memory', overcoming the limitations of charge-based memories thanks to their non-volatile behavior with lower operating voltage. This work presents an in-memory computing architecture that integrates an UltraRAM-based memory array with a custom-designed peripheral circuitry. With this architecture, we can perform various in-memory Boolean logic operations (such as NOT, NAND, NOR, and XOR) in a single cycle. Leveraging the separate read-write paths in the UltraRAM-based memory array, we optimize read operations without encountering design conflicts. This optimization enhances the sense margin, enabling the use of simpler peripheral circuitry for in-memory logic operations.
| Original language | English |
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| Title of host publication | IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025 - Conference Proceedings |
| Publisher | IEEE Computer Society |
| ISBN (Electronic) | 9798331534776 |
| DOIs | |
| State | Published - 2025 |
| Event | 28th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025 - Kalamata, Greece Duration: Jul 6 2025 → Jul 9 2025 |
Publication series
| Name | Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI |
|---|---|
| ISSN (Print) | 2159-3469 |
| ISSN (Electronic) | 2159-3477 |
Conference
| Conference | 28th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025 |
|---|---|
| Country/Territory | Greece |
| City | Kalamata |
| Period | 07/6/25 → 07/9/25 |
Funding
This manuscript has also been authored in part by UTBattelle, LLC under Contract No. DE-AC05-00OR22725 with the U.S. Department of Energy.
Keywords
- Boolean logic
- UltraRAM
- in-memory computing
- logic-inmemory