Timing and control requirements for a 32-channel AMU-ADC ASIC for the PHENIX detector

M. S. Emery; M. N. Ericson; C. L. Britton; M. C. Smith; S. S. Frank; G. R. Young; M. D. Allen; L. G. Clonts

Timing and control requirements for a 32-channel AMU-ADC ASIC for the PHENIX detector

M. S. Emery, M. N. Ericson, C. L. Britton, M. C. Smith, S. S. Frank, G. R. Young, M. D. Allen, L. G. Clonts

Sensors and Electronics

Research output: Contribution to conference › Paper › peer-review

2 Scopus citations

Abstract

A custom CMOS Application Specific Integrated Circuit (ASIC) has been developed consisting of an analog memory unit (AMU) and analog to digital converter (ADC), both of which have been designed for applications in the PHENIX experiment. This IC consists of 32 pipes of analog memory with 64 cells per pipe. Each pipe also has its own ADC channel. Timing and control signal requirements for optimum performance are discussed in this paper.

Original language	English
Pages	651-655
Number of pages	5
State	Published - 1997
Event	Proceedings of the 1997 IEEE Nuclear Science Symposium - Albuquerque, NM, USA Duration: Nov 9 1997 → Nov 15 1997

Conference

Conference	Proceedings of the 1997 IEEE Nuclear Science Symposium
City	Albuquerque, NM, USA
Period	11/9/97 → 11/15/97

Cite this

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title = "Timing and control requirements for a 32-channel AMU-ADC ASIC for the PHENIX detector",

abstract = "A custom CMOS Application Specific Integrated Circuit (ASIC) has been developed consisting of an analog memory unit (AMU) and analog to digital converter (ADC), both of which have been designed for applications in the PHENIX experiment. This IC consists of 32 pipes of analog memory with 64 cells per pipe. Each pipe also has its own ADC channel. Timing and control signal requirements for optimum performance are discussed in this paper.",

author = "Emery, {M. S.} and Ericson, {M. N.} and Britton, {C. L.} and Smith, {M. C.} and Frank, {S. S.} and Young, {G. R.} and Allen, {M. D.} and Clonts, {L. G.}",

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note = "Proceedings of the 1997 IEEE Nuclear Science Symposium ; Conference date: 09-11-1997 Through 15-11-1997",

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AU - Emery, M. S.

AU - Ericson, M. N.

AU - Britton, C. L.

AU - Smith, M. C.

AU - Frank, S. S.

AU - Young, G. R.

AU - Allen, M. D.

AU - Clonts, L. G.

PY - 1997

Y1 - 1997

N2 - A custom CMOS Application Specific Integrated Circuit (ASIC) has been developed consisting of an analog memory unit (AMU) and analog to digital converter (ADC), both of which have been designed for applications in the PHENIX experiment. This IC consists of 32 pipes of analog memory with 64 cells per pipe. Each pipe also has its own ADC channel. Timing and control signal requirements for optimum performance are discussed in this paper.

AB - A custom CMOS Application Specific Integrated Circuit (ASIC) has been developed consisting of an analog memory unit (AMU) and analog to digital converter (ADC), both of which have been designed for applications in the PHENIX experiment. This IC consists of 32 pipes of analog memory with 64 cells per pipe. Each pipe also has its own ADC channel. Timing and control signal requirements for optimum performance are discussed in this paper.

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M3 - Paper

AN - SCOPUS:0031366905

SP - 651

EP - 655

T2 - Proceedings of the 1997 IEEE Nuclear Science Symposium

Y2 - 9 November 1997 through 15 November 1997

ER -

Timing and control requirements for a 32-channel AMU-ADC ASIC for the PHENIX detector

Abstract

Conference

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