TY - GEN
T1 - Timer based digital implementation of advanced bus-clamping PWM techniques
AU - Prasad, J. S.Siva
AU - Prasad, Kamisetti N.V.
AU - Narayanan, G.
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2019/3/26
Y1 - 2019/3/26
N2 - Advanced bus-clamping pulse width modulation (ABCPWM) techniques have been shown to outperform continuous and discontinuous (i.e. bus-clamping) pulse width modulation methods in terms of line current distortion, pulsating torque (in case of motor drives) and inverter switching loss at a given average switching frequency under certain operating conditions. These ABCPWM methods clamp a phase to a dc rail (as in discontinuous modulation) and switch another phase at twice the nominal switching frequency (unlike discontinuous modulation). The 'double-switching' of the three phases in different intervals makes the implementation of such modulation schemes challenging. Further, the microcontrollers and digital signal processors available for power electronic applications are oriented towards implementation of continuous and discontinuous modulation schemes. This paper discusses the implementation of ABCPWM schemes on such processors. The features of the on-chip pulse-generation module in the digital signal processor are effectively utilized so as to avoid external hardware and to reduce the number of interrupts.
AB - Advanced bus-clamping pulse width modulation (ABCPWM) techniques have been shown to outperform continuous and discontinuous (i.e. bus-clamping) pulse width modulation methods in terms of line current distortion, pulsating torque (in case of motor drives) and inverter switching loss at a given average switching frequency under certain operating conditions. These ABCPWM methods clamp a phase to a dc rail (as in discontinuous modulation) and switch another phase at twice the nominal switching frequency (unlike discontinuous modulation). The 'double-switching' of the three phases in different intervals makes the implementation of such modulation schemes challenging. Further, the microcontrollers and digital signal processors available for power electronic applications are oriented towards implementation of continuous and discontinuous modulation schemes. This paper discusses the implementation of ABCPWM schemes on such processors. The features of the on-chip pulse-generation module in the digital signal processor are effectively utilized so as to avoid external hardware and to reduce the number of interrupts.
KW - Advanced bus-clamping pulse width modulation
KW - Digital implementation
KW - Digital signal processor
KW - Hybrid pulse width modulation
KW - Space vector
KW - Switching sequence
KW - Voltage- source converter
UR - http://www.scopus.com/inward/record.url?scp=85064390294&partnerID=8YFLogxK
U2 - 10.1109/GUCON.2018.8675064
DO - 10.1109/GUCON.2018.8675064
M3 - Conference contribution
AN - SCOPUS:85064390294
T3 - 2018 International Conference on Computing, Power and Communication Technologies, GUCON 2018
SP - 1181
EP - 1186
BT - 2018 International Conference on Computing, Power and Communication Technologies, GUCON 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 International Conference on Computing, Power and Communication Technologies, GUCON 2018
Y2 - 28 September 2018 through 29 September 2018
ER -