The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem

Manuel Arenaz; Oscar Hernandez; Dirk Pleiter

doi:10.1007/978-3-319-67630-2_19

The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem

Manuel Arenaz, Oscar Hernandez, Dirk Pleiter

Programming Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Accelerated, heterogeneous systems are becoming the norm in High Performance Computing (HPC). The challenge is choosing the right parallel programming framework to maximize performance, efficiency and productivity. The design and implementation of benchmark codes is important in many activities carried out at HPC facilities. Well known examples are fair comparison of R+D results, acceptance tests for the procurement of HPC systems, and the creation of miniapps to better understand how to port real applications to current and future supercomputers. As a result of these efforts there is a variety of public benchmark suites available to the HPC community, e.g., Linpack, NAS Parallel Benchmarks (NPB), CORAL benchmarks, and Unified European Application Benchmark Suite. The upcoming next generation of supercomputers is now leading to create new miniapps to evaluate the potential performance of different programming models on mission critical applications, such as the XRayTrace miniapp under development at the Oak Ridge National Laboratory. This paper presents the technological roadmap of Parallware, a new suite of tools for high-productivity HPC education and training, that also facilitates the porting of HPC applications. This roadmap is driven by best practices used by HPC expert developers in the parallel scientific C/C++ codes found in CORAL, NPB, and XRayTrace. The paper reports preliminary results about the parallel design patterns used in such benchmark suites, which define features that need to be supported in upcoming realeases of Parallware tools. The paper also presents performance results using standards OpenMP 4.5 and OpenACC 2.5, compilers GNU and PGI, and devices CPU and GPU from IBM, Intel and NVIDIA.

Original language	English
Title of host publication	High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers
Editors	Rio Yokota, Julian M. Kunkel, Michela Taufer, John Shalf
Publisher	Springer Verlag
Pages	237-253
Number of pages	17
ISBN (Print)	9783319676296
DOIs	https://doi.org/10.1007/978-3-319-67630-2_19
State	Published - 2017
Event	32nd International Conference on High Performance Computing, ISC High Performance 2017 - Frankfurt, Germany Duration: Jun 18 2017 → Jun 22 2017

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	10524 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	32nd International Conference on High Performance Computing, ISC High Performance 2017
Country/Territory	Germany
City	Frankfurt
Period	06/18/17 → 06/22/17

Funding

Acknowledgements. The authors gratefully acknowledge the access to the HPB PCP Pilot Systems at Julich Supercomputing Centre, which have been partially funded by the European Union Seventh Framework Programme (FP7/2007-2013) under grant agreement no. 604102 (HPB). Also thanks to the Supercomputing Centre of Galicia (CESGA) for providing access to the FinisTerrae supercomputer.

Keywords

Hybrid heterogeneous programming models
LLVM
OpenACC
OpenMP4
Performance portability
Static analysis tools
Use of parallware on minsky

Access to Document

10.1007/978-3-319-67630-2_19

Cite this

Arenaz, M., Hernandez, O., & Pleiter, D. (2017). The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem. In R. Yokota, J. M. Kunkel, M. Taufer, & J. Shalf (Eds.), High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers (pp. 237-253). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 10524 LNCS). Springer Verlag. https://doi.org/10.1007/978-3-319-67630-2_19

Arenaz, Manuel ; Hernandez, Oscar ; Pleiter, Dirk. / The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem. High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. editor / Rio Yokota ; Julian M. Kunkel ; Michela Taufer ; John Shalf. Springer Verlag, 2017. pp. 237-253 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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abstract = "Accelerated, heterogeneous systems are becoming the norm in High Performance Computing (HPC). The challenge is choosing the right parallel programming framework to maximize performance, efficiency and productivity. The design and implementation of benchmark codes is important in many activities carried out at HPC facilities. Well known examples are fair comparison of R+D results, acceptance tests for the procurement of HPC systems, and the creation of miniapps to better understand how to port real applications to current and future supercomputers. As a result of these efforts there is a variety of public benchmark suites available to the HPC community, e.g., Linpack, NAS Parallel Benchmarks (NPB), CORAL benchmarks, and Unified European Application Benchmark Suite. The upcoming next generation of supercomputers is now leading to create new miniapps to evaluate the potential performance of different programming models on mission critical applications, such as the XRayTrace miniapp under development at the Oak Ridge National Laboratory. This paper presents the technological roadmap of Parallware, a new suite of tools for high-productivity HPC education and training, that also facilitates the porting of HPC applications. This roadmap is driven by best practices used by HPC expert developers in the parallel scientific C/C++ codes found in CORAL, NPB, and XRayTrace. The paper reports preliminary results about the parallel design patterns used in such benchmark suites, which define features that need to be supported in upcoming realeases of Parallware tools. The paper also presents performance results using standards OpenMP 4.5 and OpenACC 2.5, compilers GNU and PGI, and devices CPU and GPU from IBM, Intel and NVIDIA.",

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author = "Manuel Arenaz and Oscar Hernandez and Dirk Pleiter",

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booktitle = "High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P\textasciicircum{}3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers",

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Arenaz, M, Hernandez, O & Pleiter, D 2017, The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem. in R Yokota, JM Kunkel, M Taufer & J Shalf (eds), High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 10524 LNCS, Springer Verlag, pp. 237-253, 32nd International Conference on High Performance Computing, ISC High Performance 2017, Frankfurt, Germany, 06/18/17. https://doi.org/10.1007/978-3-319-67630-2_19

The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem. / Arenaz, Manuel; Hernandez, Oscar; Pleiter, Dirk.
High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. ed. / Rio Yokota; Julian M. Kunkel; Michela Taufer; John Shalf. Springer Verlag, 2017. p. 237-253 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 10524 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem

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AU - Hernandez, Oscar

AU - Pleiter, Dirk

N1 - Publisher Copyright: © Springer International Publishing AG 2017.

PY - 2017

Y1 - 2017

N2 - Accelerated, heterogeneous systems are becoming the norm in High Performance Computing (HPC). The challenge is choosing the right parallel programming framework to maximize performance, efficiency and productivity. The design and implementation of benchmark codes is important in many activities carried out at HPC facilities. Well known examples are fair comparison of R+D results, acceptance tests for the procurement of HPC systems, and the creation of miniapps to better understand how to port real applications to current and future supercomputers. As a result of these efforts there is a variety of public benchmark suites available to the HPC community, e.g., Linpack, NAS Parallel Benchmarks (NPB), CORAL benchmarks, and Unified European Application Benchmark Suite. The upcoming next generation of supercomputers is now leading to create new miniapps to evaluate the potential performance of different programming models on mission critical applications, such as the XRayTrace miniapp under development at the Oak Ridge National Laboratory. This paper presents the technological roadmap of Parallware, a new suite of tools for high-productivity HPC education and training, that also facilitates the porting of HPC applications. This roadmap is driven by best practices used by HPC expert developers in the parallel scientific C/C++ codes found in CORAL, NPB, and XRayTrace. The paper reports preliminary results about the parallel design patterns used in such benchmark suites, which define features that need to be supported in upcoming realeases of Parallware tools. The paper also presents performance results using standards OpenMP 4.5 and OpenACC 2.5, compilers GNU and PGI, and devices CPU and GPU from IBM, Intel and NVIDIA.

AB - Accelerated, heterogeneous systems are becoming the norm in High Performance Computing (HPC). The challenge is choosing the right parallel programming framework to maximize performance, efficiency and productivity. The design and implementation of benchmark codes is important in many activities carried out at HPC facilities. Well known examples are fair comparison of R+D results, acceptance tests for the procurement of HPC systems, and the creation of miniapps to better understand how to port real applications to current and future supercomputers. As a result of these efforts there is a variety of public benchmark suites available to the HPC community, e.g., Linpack, NAS Parallel Benchmarks (NPB), CORAL benchmarks, and Unified European Application Benchmark Suite. The upcoming next generation of supercomputers is now leading to create new miniapps to evaluate the potential performance of different programming models on mission critical applications, such as the XRayTrace miniapp under development at the Oak Ridge National Laboratory. This paper presents the technological roadmap of Parallware, a new suite of tools for high-productivity HPC education and training, that also facilitates the porting of HPC applications. This roadmap is driven by best practices used by HPC expert developers in the parallel scientific C/C++ codes found in CORAL, NPB, and XRayTrace. The paper reports preliminary results about the parallel design patterns used in such benchmark suites, which define features that need to be supported in upcoming realeases of Parallware tools. The paper also presents performance results using standards OpenMP 4.5 and OpenACC 2.5, compilers GNU and PGI, and devices CPU and GPU from IBM, Intel and NVIDIA.

KW - Hybrid heterogeneous programming models

KW - LLVM

KW - OpenACC

KW - OpenMP4

KW - Performance portability

KW - Static analysis tools

KW - Use of parallware on minsky

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DO - 10.1007/978-3-319-67630-2_19

M3 - Conference contribution

AN - SCOPUS:85032660226

SN - 9783319676296

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 237

EP - 253

BT - High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers

A2 - Yokota, Rio

A2 - Kunkel, Julian M.

A2 - Taufer, Michela

A2 - Shalf, John

PB - Springer Verlag

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Arenaz M, Hernandez O, Pleiter D. The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem. In Yokota R, Kunkel JM, Taufer M, Shalf J, editors, High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers. Springer Verlag. 2017. p. 237-253. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-319-67630-2_19

The technological roadmap of parallware and its alignment with the OpenPOWER ecosystem

Abstract

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Keywords

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