The HPC Challenge (HPCC) benchmark suite

Piotr R. Luszczek, David H. Bailey, Jack J. Dongarra, Jeremy Kepner, Robert F. Lucas, Rolf Rabenseifner, Daisuke Takahashi

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

191 Scopus citations

Abstract

In 2003, the DARPA's High Productivity Computing Systems released the HPCC suite. It examines the performance of HPC architectures using kernels with various memory access patterns of well known computational kernels. Consequently, HPCC results bound the performance of real applications as a function of memory access characteristics and define performance boundaries of HPC architectures. The suite was intended to augment the TOP500 list and by now the results are publicly available for 6 out of 10 of the world's fastest computers. Implementations exist in most of the major high-end programming languages and environments, accompanied by countless optimization efforts. The increased publicity enjoyed by HPCC doesn't necessarily translate into deeper understanding of the performance issues that HPCC benchmarks. And so this tutorial will introduce attendees to HPCC, provide tools to examine differences in HPC architectures, and give hands-on training that will hopefully lead to better understanding of parallel environments.

Original languageEnglish
Title of host publicationProceedings of the 2006 ACM/IEEE Conference on Supercomputing, SC'06
DOIs
StatePublished - 2006

Publication series

NameProceedings of the 2006 ACM/IEEE Conference on Supercomputing, SC'06

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