Abstract
The use of maskless lithography processes for printing structures on integrated circuits (IC) is discussed. A maskless printing system was modeled from a signal processing point of view, utilizing image processing algorithms and concepts to study the effects of various real-world constraints and their implications for a maskless lithography system. The best printable image were determined for a variety of redundant scanning array concept (RSA) geometries, which resulted in the printer element spacing. The results indicate that the printing quality is the key element for the determination of the necessary data rates to support competitive manufacturing with masskless lithography devices.
Original language | English |
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Pages (from-to) | 1080-1091 |
Number of pages | 12 |
Journal | Proceedings of SPIE - The International Society for Optical Engineering |
Volume | 5374 |
Issue number | PART 2 |
DOIs | |
State | Published - 2004 |
Event | Emerging Lithographic Technologies VIII - Santa Clara, CA, United States Duration: Feb 24 2004 → Feb 26 2004 |