Simulations of busy probabilities in the ALPIDE chip and the upgraded ALICE ITS detector

ALICE ITS collaboration

Research output: Contribution to journalConference articlepeer-review

Abstract

For the Long Shutdown 2 (LS2) upgrade of the ITS detector in the ALICE experiment at the LHC, a novel pixel detector chip, the ALPIDE chip, has been developed. In the event of busy ALPIDE chips in the ITS detector, the readout electronics may need to take appropriate action to minimize loss of data. This paper presents a lightweight, statistical simulation model for the ALPIDE chip and the upgraded ITS detector, developed using the SystemC framework. The purpose of the model is to quantify the probability of a busy condition and the data taking efficiency of the ALPIDE chips under various conditions, and to apply this knowledge during the development of the readout electronics and firmware.

Original languageEnglish
JournalProceedings of Science
Volume2017-September
StatePublished - 2017
Externally publishedYes
Event2017 Topical Workshop on Electronics for Particle Physics, TWEPP 2017 - Santa Cruz, United States
Duration: Sep 11 2017Sep 14 2017

Fingerprint

Dive into the research topics of 'Simulations of busy probabilities in the ALPIDE chip and the upgraded ALICE ITS detector'. Together they form a unique fingerprint.

Cite this