TY - GEN
T1 - SiGe BiCMOS 12-bit 8-channel low power wilkinson ADC
AU - Nambiar, N.
AU - Ulaganathan, C.
AU - Chen, S.
AU - Hale, M.
AU - Antonacci, A.
AU - Blalock, B. J.
AU - Britton, C. L.
AU - Ericson, M. N.
PY - 2008
Y1 - 2008
N2 - A multichannel low power analog-to-digital converter (ADC) designed, fabricated and tested in 0.5-μm Silicon Germanium BiCMOS process is reported. The 12-bit ADC features 8 input channels, each having a 10-Ksps sampling rate and an input voltage range of 1.2 V. The ADC architecture, comprised of a ramp generator, comparators, and a Gray code counter, is discussed along with design details of the primary blocks. Measurement data shows a differential nonlinearity of less than 0.5 LSB and an approximate accuracy of 10 bits.
AB - A multichannel low power analog-to-digital converter (ADC) designed, fabricated and tested in 0.5-μm Silicon Germanium BiCMOS process is reported. The 12-bit ADC features 8 input channels, each having a 10-Ksps sampling rate and an input voltage range of 1.2 V. The ADC architecture, comprised of a ramp generator, comparators, and a Gray code counter, is discussed along with design details of the primary blocks. Measurement data shows a differential nonlinearity of less than 0.5 LSB and an approximate accuracy of 10 bits.
UR - http://www.scopus.com/inward/record.url?scp=54249086279&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2008.4616883
DO - 10.1109/MWSCAS.2008.4616883
M3 - Conference contribution
AN - SCOPUS:54249086279
SN - 9781424421671
T3 - Midwest Symposium on Circuits and Systems
SP - 650
EP - 653
BT - 2008 IEEE International 51st Midwest Symposium on Circuits and Systems, MWSCAS
T2 - 2008 IEEE International 51st Midwest Symposium on Circuits and Systems, MWSCAS
Y2 - 10 August 2008 through 13 August 2008
ER -