Self-adaptive multiprecision preconditioners on multicore and Manycore architectures

Hartwig Anzt, Dimitar Lukarski, Stanimire Tomov, Jack Dongarra

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Based on the premise that preconditioners needed for scientific computing are not only required to be robust in the numerical sense, but also scalable for up to thousands of light-weight cores, we argue that this two-fold goal is achieved for the recently developed self-adaptive multi-elimination preconditioner. For this purpose, we revise the underlying idea and analyze the performance of implementations realized in the PARALUTION and MAGMA open-source software libraries on GPU architectures (using either CUDA or OpenCL), Intel’s Many Integrated Core Architecture, and Intel’s Sandy Bridge processor. The comparison with other well-established preconditioners like multi-coloured Gauss- Seidel, ILU(0) and multi-colored ILU(0), shows that the twofold goal of a numerically stable cross-platform performant algorithm is achieved.

Original languageEnglish
Title of host publicationHigh Performance Computing for Computational Science - VECPAR 2014 - 11th International Conference, Revised Selected Papers
EditorsOsni Marques, Michel Dayde, Kengo Nakajima
PublisherSpringer Verlag
Pages115-123
Number of pages9
ISBN (Print)9783319173528
DOIs
StatePublished - 2015
Event11th International Conference on High Performance Computing for Computational Science, VECPAR 2014 - Eugene, United States
Duration: Jun 30 2014Jul 3 2014

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume8969
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference11th International Conference on High Performance Computing for Computational Science, VECPAR 2014
Country/TerritoryUnited States
CityEugene
Period06/30/1407/3/14

Funding

This work has been supported by the Linnaeus centre of excellence UPMARC, Uppsala Programming for Multicore Architectures Research Center, the Russian Scientific Fund (Agreement N14-11-00190), DOE grant #DE-SC0010042, NVIDIA, and the NSF grant # ACI-1339822.

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