Revealing Na-segregation at the Si/Graphene Interface and Its Implications toward the Na-storage Behavior of Si-Based Electrodes

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Abstract

The feasibility of reversible alloying of Na with Si has led to Si being considered as a potential anode material for the upcoming Na-ion battery system. However, Si exhibits useful Na-storage capacity and associated electrochemical cyclic stability only in the presence of graphene-based interlayers/additives. Despite this, no knowledge exists concerning the characteristics/phenomena at the Si/graphene interface and the possible influence of the same toward Na-storage behavior/performance. Against this backdrop, a combination of first-principles-based calculations and experimental investigations has revealed here the occurrence of preferential Na-segregation at the Si/graphene interface. Bader charge analysis indicates that when positioned right at the interface, Na undergoes the greatest extent of charge transfer (to become positively charged), with electrons being transferred primarily to the more electronegative C (as compared to Si). More importantly, the binding energy of Na assumes the most negative value at the interface. Furthermore, the overall energy of the Na-Si-graphene system gets minimized to the greatest extent when the Na atom gets located at the Si/graphene interface. The abovementioned predictions have been verified by mapping the Na-concentrations from the surfaces of galvanostatically sodiated amorphous Si films down to bare Cu or graphene-coated Cu substrates (i.e., across Si film thickness) via depth profiling ToF-SIMS. Such measurements indicate that the overall Na-concentration in the sodiated Si film is considerably greater in the presence of a graphene-based interlayer between Si and Cu, thus agreeing with the as-observed enhanced Na-storage capacity. More importantly, the observation of a definite "hump" in the Na-concentration profile very close to the Si/graphene interface, in contrast to almost no Na-concentration close to the Si/Cu interface in the absence of a graphene-based interlayer, is direct evidence for preferential Na-segregation at the Si/graphene interface (unlike at the Si/Cu interface).

Original languageEnglish
Pages (from-to)9667-9675
Number of pages9
JournalACS Applied Materials and Interfaces
Volume14
Issue number7
DOIs
StatePublished - Feb 23 2022

Funding

The authors would like to thank DST-SERB (vide: EMR/2016/000760), Government of India, for financial assistances and CEN, SAIF, and ICCF (IIT Bombay) for enabling the usages of some of the experimental/analytical facilities. AM also likes to thank the National Centre for Photovoltaic Research and Education (NCPRE; vide MNRE, Govt. of India), IIT Bombay, for providing partial financial support. The authors are grateful toward Prof. M. Aslam, IIT Bombay, for providing help and facility with respect to grapheme deposition. AB acknowledges the IITB seed grant (RD/0517-IRCCSH0-043), SERB ECRA grant (ECR/2018/002356), and BRNS regular grant (BRNS/37098) for the financial assistance. The high-performance computational facilities, namely Aron (AbCMS lab, IITB), Dendrite (MEMS dept., IITB), Spacetime, IITB, and CDAC Pune (Param Yuva-II), are acknowledged for providing the computational hours. The authors would like to thank DST-SERB (vide: EMR/2016/000760), Government of India, for financial assistances and CEN, SAIF, and ICCF (IIT Bombay) for enabling the usages of some of the experimental/analytical facilities. AM also likes to thank the National Centre for Photovoltaic Research and Education (NCPRE; vide MNRE, Govt. of India), IIT Bombay, for providing partial financial support. The authors are grateful toward Prof. M. Aslam, IIT Bombay, for providing help and facility with respect to graphene deposition. AB acknowledges the IITB seed grant (RD/0517-IRCCSH0-043), SERB ECRA grant (ECR/2018/002356), and BRNS regular grant (BRNS/37098) for the financial assistance. The high-performance computational facilities, namely Aron (AbCMS lab, IITB), Dendrite (MEMS dept., IITB), Spacetime, IITB, and CDAC Pune (Param Yuva-II), are acknowledged for providing the computational hours.

Keywords

  • buffer interlayer
  • Na-ion battery
  • Na-segregation
  • Si anode
  • Si/graphene interface

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