Rapid yield learning through optical defect and electrical test analysis

Shaun S. Gleason, Kenneth W. Tobin, Thomas P. Karnowski, Fred Lakhani

Research output: Contribution to journalConference articlepeer-review

20 Scopus citations

Abstract

As semiconductor device density and wafer area continue to increase, the volume of in-line and off-line data required to diagnose yield-limiting conditions is growing exponentially. To manage this data in the future, analysis tools will be required that can automatically reduce this data to useful information, e.g., by assisting the engineer in rapid root-cause diagnosis of defect generating mechanisms. In this paper, we describe a technology known as Spatial Signature Analysis (SSA) and its application to both optically-detected defect data as well as electrical test (e-test) bin data. The results of a validation study are summarized that demonstrate the effectiveness of the SSA approach on optical defect wafermaps through field-testing at three semiconductor manufacturing sites on ASIC, DRAM and SRAM products. This method has been extended to analyze and interpret electrical test data and to provide a pathway for correlation of this data with in-line optical measurements. The image processing-based, fuzzy classifier system used for optical defect SSA has been adopted and applied to e-test binmaps to interpret and rapidly identify characteristic patterns, or "signatures", in the binmap data that are uniquely associated with the manufacturing process. An image of the binmap is created, and features such as mass, simple moments, and invariant moments are extracted and presented to a pair-wise, fuzzy, k-NN classifier. The preliminary performance results show an 84% correct e-test signature classification rate, even under sub-optimal training conditions.

Original languageEnglish
Pages (from-to)232-242
Number of pages11
JournalProceedings of SPIE - The International Society for Optical Engineering
Volume3332
DOIs
StatePublished - 1998
EventMetrology, Inspection, and Process Control for Microlithography XII - Santa Clara, CA, United States
Duration: Feb 23 1998Feb 25 1998

Keywords

  • Electrical test
  • Moments
  • Semiconductor inspection
  • Spatial pattern recognition

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