QCDOC: A 10-teraflops scale computer for lattice QCD

D. Chen; N. H. Christ; C. Cristian; Z. Dong; A. Gara; K. Garg; B. Joo; C. Kim; L. Levkova; X. Liao; R. D. Mawhinney; S. Ohta; T. Wettig

doi:10.1016/S0920-5632(01)01014-3

QCDOC: A 10-teraflops scale computer for lattice QCD

D. Chen
, N. H. Christ
, C. Cristian
, Z. Dong
, A. Gara
, K. Garg
, B. Joo
, C. Kim
, L. Levkova
, X. Liao
, R. D. Mawhinney
, S. Ohta
, T. Wettig

Research output: Contribution to journal › Article › peer-review

32 Scopus citations

Abstract

The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from "QCD On a Chip".

Original language	English
Pages (from-to)	825-832
Number of pages	8
Journal	Nuclear Physics B - Proceedings Supplements
Volume	94
Issue number	1-3
DOIs	https://doi.org/10.1016/S0920-5632(01)01014-3
State	Published - Mar 2001
Externally published	Yes

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10.1016/S0920-5632(01)01014-3

Cite this

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title = "QCDOC: A 10-teraflops scale computer for lattice QCD",

abstract = "The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from {"}QCD On a Chip{"}.",

author = "D. Chen and Christ, \{N. H.\} and C. Cristian and Z. Dong and A. Gara and K. Garg and B. Joo and C. Kim and L. Levkova and X. Liao and Mawhinney, \{R. D.\} and S. Ohta and T. Wettig",

year = "2001",

month = mar,

doi = "10.1016/S0920-5632(01)01014-3",

language = "English",

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journal = "Nuclear Physics B - Proceedings Supplements",

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T2 - A 10-teraflops scale computer for lattice QCD

AU - Chen, D.

AU - Christ, N. H.

AU - Cristian, C.

AU - Dong, Z.

AU - Gara, A.

AU - Garg, K.

AU - Joo, B.

AU - Kim, C.

AU - Levkova, L.

AU - Liao, X.

AU - Mawhinney, R. D.

AU - Ohta, S.

AU - Wettig, T.

PY - 2001/3

Y1 - 2001/3

N2 - The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from "QCD On a Chip".

AB - The architecture of a new class of computers, optimized for lattice QCD calculations, is described. An individual node is based on a single integrated circuit containing a PowerPC 32-bit integer processor with a 1 Gflops 64-bit IEEE floating point unit, 4 Mbyte of memory, 8 Gbit/sec nearest-neighbor communications and additional control and diagnostic circuitry. The machine's name, QCDOC, derives from "QCD On a Chip".

UR - https://www.scopus.com/pages/publications/0035285517

U2 - 10.1016/S0920-5632(01)01014-3

DO - 10.1016/S0920-5632(01)01014-3

M3 - Article

AN - SCOPUS:0035285517

SN - 0920-5632

VL - 94

SP - 825

EP - 832

JO - Nuclear Physics B - Proceedings Supplements

JF - Nuclear Physics B - Proceedings Supplements

IS - 1-3

ER -

QCDOC: A 10-teraflops scale computer for lattice QCD

Abstract

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