TY - GEN
T1 - Poster
T2 - 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019
AU - Tine, Blaise Pascal
AU - Yalamanchili, Sudhakar
AU - Kim, Hyesoon
AU - Vetter, Jeff
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/9
Y1 - 2019/9
N2 - The end of Moore's law with the advent of hardware specialization presents a unique challenge for a much tighter software and hardware co-design environment to exploit domain-specific optimizations and increase design efficiency. The productivity of software-hardware codesign relies not on only in better integration between the software and hardware design methodologies but more importantly in the effectiveness of the design tools at reducing the development time. In this work, we developed Tango, an Optimizing compiler for a Just-in-Time RTL simulator. Tango implements unique hardware-centric compiler transformations to speed up runtime code generation in a software-hardware codesign environment where hardware simulation speed is critical. Tango achieves a 3x average speedup compared to the state-of-The-Art RTL simulators.
AB - The end of Moore's law with the advent of hardware specialization presents a unique challenge for a much tighter software and hardware co-design environment to exploit domain-specific optimizations and increase design efficiency. The productivity of software-hardware codesign relies not on only in better integration between the software and hardware design methodologies but more importantly in the effectiveness of the design tools at reducing the development time. In this work, we developed Tango, an Optimizing compiler for a Just-in-Time RTL simulator. Tango implements unique hardware-centric compiler transformations to speed up runtime code generation in a software-hardware codesign environment where hardware simulation speed is critical. Tango achieves a 3x average speedup compared to the state-of-The-Art RTL simulators.
KW - Hardware simulation
KW - Just-in-Time compilation
KW - hardware description language
UR - http://www.scopus.com/inward/record.url?scp=85075427730&partnerID=8YFLogxK
U2 - 10.1109/PACT.2019.00055
DO - 10.1109/PACT.2019.00055
M3 - Conference contribution
AN - SCOPUS:85075427730
T3 - Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
SP - 480
EP - 481
BT - Proceedings - 2019 28th International Conference on Parallel Architectures and Compilation Techniques, PACT 2019
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 21 September 2019 through 25 September 2019
ER -