TY - GEN
T1 - Pixel detectors in 3D technologies for high energy physics
AU - Deptuch, G.
AU - Demarteau, M.
AU - Hoff, J.
AU - Lipton, R.
AU - Shenai, A.
AU - Yarema, R.
AU - Zimmerman, T.
PY - 2010
Y1 - 2010
N2 - This paper reports on the current status of the development of International Linear Collider vertex detector pixel readout chips based on multi-tier vertically integrated electronics. Initial testing results of the VIP2a prototype are presented. The chip is the second embodiment of the prototype data-pushed readout concept developed at Fermilab. The device was fabricated in the MIT-LL 0.15 μm fully depleted SOI process. The prototype is a three-tier design, featuring 30x30 μm2 pixels, laid out in an array of 48x48 pixels.
AB - This paper reports on the current status of the development of International Linear Collider vertex detector pixel readout chips based on multi-tier vertically integrated electronics. Initial testing results of the VIP2a prototype are presented. The chip is the second embodiment of the prototype data-pushed readout concept developed at Fermilab. The device was fabricated in the MIT-LL 0.15 μm fully depleted SOI process. The prototype is a three-tier design, featuring 30x30 μm2 pixels, laid out in an array of 48x48 pixels.
UR - http://www.scopus.com/inward/record.url?scp=79955957431&partnerID=8YFLogxK
U2 - 10.1109/3DIC.2010.5751483
DO - 10.1109/3DIC.2010.5751483
M3 - Conference contribution
AN - SCOPUS:79955957431
SN - 9781457705274
T3 - IEEE 3D System Integration Conference 2010, 3DIC 2010
BT - IEEE 3D System Integration Conference 2010, 3DIC 2010
T2 - 2nd IEEE International 3D System Integration Conference, 3DIC 2010
Y2 - 16 November 2010 through 18 November 2010
ER -