TY - GEN
T1 - Performance modeling of emerging HPC architectures
AU - Bhatia, Nikhil
AU - Alam, Sadaf R.
AU - Vetter, Jeffrey S.
PY - 2006
Y1 - 2006
N2 - Current state-of-art HPCMP performance modeling techniques primarily rely on combining a performance profile of an application on a well-known HPC architecture, and the machine characteristics of an emerging architecture to project an application's performance on the emerging architecture. Existing profiling and tracing tools on well-known architectures are typically used to collect the necessary performance data by executing applications and benchmarks on available systems. Since the performance enhancing features of novel processing devices may be significantly different from a conventional microprocessor system, current performance modeling schemes have limited applicability on systems like the Cray X1E vector supercomputer and parallel systems with accelerator devices like Cray XD1, which contains FPGAs. We employ an application modeling paradigm that allows a user to develop not only "architecture aware" but also "application aware" performance models. We extend the Modeling Assertions (MA) framework that permits a user to develop multi-resolution, parameterized symbolic models. We demonstrate the application of our modeling scheme by augmenting the MA models with performance enhancing attributes of the Cray X1E Multistreaming Processors (MSPs). Using the extended MA framework, we develop symbolic performance models of critical code blocks of an HPCMP TI-06 benchmark called HYCOM - an ocean modeling code. By representing the code characteristics of the critical code blocks in terms of both unique architectural attributes and key input parameters of the HYCOM application, we manage to reduce and sustain performance prediction error rates to less than 30%.
AB - Current state-of-art HPCMP performance modeling techniques primarily rely on combining a performance profile of an application on a well-known HPC architecture, and the machine characteristics of an emerging architecture to project an application's performance on the emerging architecture. Existing profiling and tracing tools on well-known architectures are typically used to collect the necessary performance data by executing applications and benchmarks on available systems. Since the performance enhancing features of novel processing devices may be significantly different from a conventional microprocessor system, current performance modeling schemes have limited applicability on systems like the Cray X1E vector supercomputer and parallel systems with accelerator devices like Cray XD1, which contains FPGAs. We employ an application modeling paradigm that allows a user to develop not only "architecture aware" but also "application aware" performance models. We extend the Modeling Assertions (MA) framework that permits a user to develop multi-resolution, parameterized symbolic models. We demonstrate the application of our modeling scheme by augmenting the MA models with performance enhancing attributes of the Cray X1E Multistreaming Processors (MSPs). Using the extended MA framework, we develop symbolic performance models of critical code blocks of an HPCMP TI-06 benchmark called HYCOM - an ocean modeling code. By representing the code characteristics of the critical code blocks in terms of both unique architectural attributes and key input parameters of the HYCOM application, we manage to reduce and sustain performance prediction error rates to less than 30%.
UR - http://www.scopus.com/inward/record.url?scp=48649093585&partnerID=8YFLogxK
U2 - 10.1109/HPCMP-UGC.2006.58
DO - 10.1109/HPCMP-UGC.2006.58
M3 - Conference contribution
AN - SCOPUS:48649093585
SN - 0769527973
SN - 9780769527970
T3 - Proceedings - HPCMP Users Group Conference, UGC 2006
SP - 367
EP - 373
BT - Proceedings - HPCMP Users Group Conference, UGC 2006
T2 - HPCMP Users Group Conference, UGC 2006
Y2 - 26 June 2006 through 29 June 2006
ER -