Overview of the HPC challenge benchmark suite

Jack J. Dongarra, Piotr Luszczek

Research output: Contribution to conferencePaperpeer-review

6 Scopus citations

Abstract

The HPC Challenge1 benchmark suite has been released by the DARPA HPCS program to help define the performance boundaries of future Petascale computing systems. HPC Challenge is a suite of tests that examine the performance of HPC architectures using kernels with memory access patterns more challenging than those of the High Performance Lin-pack (HPL) benchmark used in the Top500 list. Thus, the suite is designed to augment the Top500 list, providing benchmarks that bound the performance of many real applications as a function of memory access characteristics e.g., spatial and temporal locality, and providing a framework for including additional tests. In particular, the suite is composed of several well known computational kernels (STREAM, HPL, matrix multiply - DGEMM, parallel matrix transpose - PTRANS, FFT, RandomAccess, and bandwidth/latency tests - b eff) that attempt to span high and low spatial and temporal locality space. By design, the HPC Challenge tests are scalable with the size of data sets being a function of the largest HPL matrix for the tested system.

Original languageEnglish
StatePublished - 2006
Externally publishedYes
EventSPEC Benchmark Workshop 2006 - Austin, TX, United States
Duration: Jan 23 2006Jan 23 2006

Conference

ConferenceSPEC Benchmark Workshop 2006
Country/TerritoryUnited States
CityAustin, TX
Period01/23/0601/23/06

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