Abstract
Computer architecture experts expect that non-volatile memory (NVM) hierarchies will play a more significant role in future systems including mobile, enterprise, and HPC architectures. With this expectation in mind, we present NVL-C1: a novel programming system that facilitates the efficient and correct programming of NVM main memory systems. The NVL-C programming abstraction extends C with a small set of intuitive language features that target NVM main memory, and can be combined directly with traditional C memory model features for DRAM. We have designed these new features to enable compiler analyses and run-time checks that can improve performance and guard against a number of subtle programming errors, which, when left uncorrected, can corrupt NVM-stored data. Moreover, to enable recovery of data across application or system failures, these NVL-C features include a exible directive for specifying NVM transactions. So that our implementation might be extended to other compiler front ends and languages, the majority of our compiler analyses are implemented in an extended version of LLVM's intermediate representation (LLVM IR). We evaluate NVL-C on a number of applications to show its exibility, performance, and correctness.
| Original language | English |
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| Title of host publication | HPDC 2016 - Proceedings of the 25th ACM International Symposium on High-Performance Parallel and Distributed Computing |
| Publisher | Association for Computing Machinery, Inc |
| Pages | 125-136 |
| Number of pages | 12 |
| ISBN (Electronic) | 9781450343145 |
| DOIs | |
| State | Published - May 31 2016 |
| Event | 25th ACM International Symposium on High-Performance Parallel and Distributed Computing, HPDC 2016 - Kyoto, Japan Duration: May 31 2016 → Jun 4 2016 |
Publication series
| Name | HPDC 2016 - Proceedings of the 25th ACM International Symposium on High-Performance Parallel and Distributed Computing |
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Conference
| Conference | 25th ACM International Symposium on High-Performance Parallel and Distributed Computing, HPDC 2016 |
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| Country/Territory | Japan |
| City | Kyoto |
| Period | 05/31/16 → 06/4/16 |
Funding
The authors thank Philip Roth (ORNL) for his help in administering the evaluation testbed, and FusionIO (now Western Digital/SanDisk) for providing our ioScale card. This material is based upon work supported by the U.S. Department of Energy (DOE), Office of Science, Office of Advanced Scientific Computing Research. This manuscript has been authored by UT-Battelle, LLC under Contract No. DE-AC05-00OR22725 with the DOE. The United States Government (USG) retains and the publisher, by accepting the article for publication, acknowledges that the USG retains a non-exclusive, paid-up, irrevocable, world-wide license to publish or reproduce the published form of this manuscript, or allow others to do so, for USG purposes. The DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan (http://energy.gov/downloads/doe-public-access-plan).