Nanoengineered Curie temperature in laterally patterned ferromagnetic semiconductor heterostructures

K. F. Eid; B. L. Sheu; O. Maksimov; M. B. Stone; P. Schiffer; N. Samarth

doi:10.1063/1.1900938

Nanoengineered Curie temperature in laterally patterned ferromagnetic semiconductor heterostructures

K. F. Eid, B. L. Sheu, O. Maksimov, M. B. Stone, P. Schiffer, N. Samarth

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Abstract

We demonstrate the manipulation of the Curie temperature of buried layers of the ferromagnetic semiconductor (Ga,Mn)As using nanolithography to enhance the effect of annealing. Patterning the GaAs-capped ferromagnetic layers into nanowires exposes free surfaces at the sidewalls of the patterned (Ga,Mn)As layers and thus allows the removal of Mn interstitials using annealing. This leads to an enhanced Curie temperature and reduced resistivity compared to unpatterned samples. For a fixed annealing time, the enhancement of the Curie temperature is larger for narrower nanowires.

Original language	English
Article number	152505
Pages (from-to)	1-3
Number of pages	3
Journal	Applied Physics Letters
Volume	86
Issue number	15
DOIs	https://doi.org/10.1063/1.1900938
State	Published - 2005

Funding

This research has been supported by Grant Nos. ONR N0014-05-1-0107, DARPA∕ONR N00014-99-1093, -00-1-0951, University of California-Santa Barbara Subcontract KK4131, and NSF DMR-0305238 and -0401486. This work was performed in part at the Penn State Nanofabrication Facility, a member of the NSF National Nanofabrication Users Network.

Funders	Funder number
University of California-Santa Barbara Subcontract	KK4131
National Science Foundation	DMR-0305238
Directorate for Mathematical and Physical Sciences	0305238, 0401486
Defense Advanced Research Projects Agency	N00014-99-1093, -00-1-0951

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AU - Samarth, N.

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Nanoengineered Curie temperature in laterally patterned ferromagnetic semiconductor heterostructures

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