Mobility improvement and temperature dependence in MoSe ₂ field-effect transistors on parylene-C substrate

We report low-temperature scanning tunneling microscopy characterization of MoSe ₂ crystals and the fabrication and electrical characterization of MoSe ₂ field-effect transistors on both SiO ₂ and parylene-C substrates. We find that the multilayer MoSe ₂ devices on parylene-C show a room-temperature mobility close to the mobility of bulk MoSe ₂ (100-160 cm ² V ^-1 s ^-1 ), which is significantly higher than that on SiO ₂ substrates (≈50 cm ² V ^-1 s ^-1 ). The room-temperature mobility on both types of substrates are nearly thickness-independent. Our variable-temperature transport measurements reveal a metal-insulator transition at a characteristic conductivity of e ² /h. The mobility of MoSe ₂ devices extracted from the metallic region on both SiO ₂ and parylene-C increases up to ≈500 cm ² V ^-1 s ^-1 as the temperature decreases to ≈100 K, with the mobility of MoSe ₂ on SiO ₂ increasing more rapidly. In spite of the notable variation of charged impurities as indicated by the strongly sample-dependent low-temperature mobility, the mobility of all MoSe ₂ devices on SiO ₂ converges above 200 K, indicating that the high temperature (>200 K) mobility in these devices is nearly independent of the charged impurities. Our atomic force microscopy study of SiO ₂ and parylene-C substrates further rules out the surface roughness scattering as a major cause of the substrate-dependent mobility. We attribute the observed substrate dependence of MoSe ₂ mobility primarily to the surface polar optical phonon scattering originating from the SiO ₂ substrate, which is nearly absent in MoSe ₂ devices on parylene-C substrate.