Abstract
The work done for both PHENIX and the Naval Research Laboratory in the area of full-custom, mixed-signal complimentary metal oxide semiconductor (CMOS) integrated electronics are outlined. An architecture utilizing simultaneous read-write analog memories will be used throughout the detector to allow data to be continuously taken even during event readout. The architectures chosen for the various PHENIX detectors include position-sensitive silicon, capacitive pixel, and phototube detectors. The performance of the custom preamplifiers, discriminators, analog memories, analog-digital converters, and control circuitry for all systems are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 306-317 |
| Number of pages | 12 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 3445 |
| State | Published - 1998 |
| Event | Proceedings of the 1998 Conference on EUV, X-Ray, and Gamma-Ray Instrumentation for Astronomy IX - San Diego, CA, USA Duration: Jul 22 1998 → Jul 24 1998 |