MICROPROCESSOR IMPLEMENTATION OF THE VITERBI DETECTOR.

Maureen Wilson, Stewart Crozier, K. William Moreland, Joseph Camelon, Peter McLane

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

The Viterbi detector exhibits improved error performance for intersymbol interference channels relative to linear receivers. However, it is quite complex as the storage and processing required grows exponentially with the channel memory. It is assumed that the detector would be preceded by a linear digital filter that would shorten the channel memory. For small channel memories, it was possible to implement a relatively simple version of the Viterbi detector. This detector was implemented on an eight-bit microprocessor and tested in the laboratory. The results give an estimate of the complexity and implementation loss that would occur in more practical digital implementations.

Original languageEnglish
Pages25. 5. 1-25. 5. 4
StatePublished - 1979
EventNTC Conf Rec Natl Telecommun Conf - Washington, DC, USA
Duration: Nov 27 1979Nov 29 1979

Conference

ConferenceNTC Conf Rec Natl Telecommun Conf
CityWashington, DC, USA
Period11/27/7911/29/79

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