Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned

Milan Radulovic; Kazi Asifuzzaman; Darko Zivanovic; Nikola Rajovic; Guillaume Colin De Verdiere; Dirk Pleiter; Manolis Marazakisl; Nikolaos Kallimanis; Paul Carpenter; Petar Radojkovic; Eduard Ayguade

doi:10.1109/CAHPC.2018.8645891

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned

Milan Radulovic, Kazi Asifuzzaman, Darko Zivanovic, Nikola Rajovic, Guillaume Colin De Verdiere, Dirk Pleiter, Manolis Marazakisl, Nikolaos Kallimanis, Paul Carpenter, Petar Radojkovic, Eduard Ayguade

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

Various servers with different characteristics and architectures are hitting the market, and their evaluation and comparison in terms of HPC features is complex and multidimensional. In this paper, we share our experience of evaluating a diverse set of HPC systems, consisting of three mainstream and five emerging architectures. We evaluate the performance and power efficiency using prominent HPC benchmarks, High-Performance Linpack (HPL) and High Performance Conjugate Gradients (HPCG), and expand our analysis using publicly available specialized kernel benchmarks, targeting specific system components. In addition to a large body of quantitative results, we emphasize six usually overlooked aspects of the HPC platforms evaluation, and share our conclusions and lessons learned. Overall, we believe that this paper will improve the evaluation and comparison of HPC platforms, making a first step towards a more reliable and uniform methodology.

Original language	English
Title of host publication	Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	250-257
Number of pages	8
ISBN (Electronic)	9781538677698
DOIs	https://doi.org/10.1109/CAHPC.2018.8645891
State	Published - Jul 2 2018
Externally published	Yes
Event	30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018 - Lyon, France Duration: Sep 24 2018 → Sep 27 2018

Publication series

Name	Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018

Conference

Conference	30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018
Country/Territory	France
City	Lyon
Period	09/24/18 → 09/27/18

Funding

ACKNOWLEDGEMENT This work was supported by the Spanish Ministry of Science and Technology (project TIN2015-65316-P), Generalitat de Catalunya (contracts 2014-SGR-1051 and 2014-SGR-1272), Severo Ochoa Programme (SEV-2015-0493) of the Spanish Government; and the European Union’s Horizon 2020 research and innovation programme under ExaNoDe project (grant agreement No 671578).

Funders	Funder number
Severo Ochoa Programme	SEV-2015-0493
Horizon 2020 Framework Programme	671578, 800898
Generalitat de Catalunya	2014-SGR-1272, 2014-SGR-1051
Ministerio de Ciencia y Tecnología	TIN2015-65316-P

Keywords

BytelFLOP ratio
HPC
emerging and mainstream architectures
energy efficiency
memory latency and bandwidth
weak vs. strong cores

Access to Document

10.1109/CAHPC.2018.8645891

Cite this

Radulovic, M., Asifuzzaman, K., Zivanovic, D., Rajovic, N., De Verdiere, G. C., Pleiter, D., Marazakisl, M., Kallimanis, N., Carpenter, P., Radojkovic, P., & Ayguade, E. (2018). Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. In Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018 (pp. 250-257). Article 8645891 (Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CAHPC.2018.8645891

Radulovic, Milan ; Asifuzzaman, Kazi ; Zivanovic, Darko et al. / Mainstream vs. Emerging HPC : Metrics, Trade-Offs and Lessons Learned. Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 250-257 (Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018).

@inproceedings{e629cf3b69554d7c8d71b4e7bd565515,

title = "Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned",

abstract = "Various servers with different characteristics and architectures are hitting the market, and their evaluation and comparison in terms of HPC features is complex and multidimensional. In this paper, we share our experience of evaluating a diverse set of HPC systems, consisting of three mainstream and five emerging architectures. We evaluate the performance and power efficiency using prominent HPC benchmarks, High-Performance Linpack (HPL) and High Performance Conjugate Gradients (HPCG), and expand our analysis using publicly available specialized kernel benchmarks, targeting specific system components. In addition to a large body of quantitative results, we emphasize six usually overlooked aspects of the HPC platforms evaluation, and share our conclusions and lessons learned. Overall, we believe that this paper will improve the evaluation and comparison of HPC platforms, making a first step towards a more reliable and uniform methodology.",

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author = "Milan Radulovic and Kazi Asifuzzaman and Darko Zivanovic and Nikola Rajovic and {De Verdiere}, {Guillaume Colin} and Dirk Pleiter and Manolis Marazakisl and Nikolaos Kallimanis and Paul Carpenter and Petar Radojkovic and Eduard Ayguade",

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Radulovic, M, Asifuzzaman, K, Zivanovic, D, Rajovic, N, De Verdiere, GC, Pleiter, D, Marazakisl, M, Kallimanis, N, Carpenter, P, Radojkovic, P & Ayguade, E 2018, Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. in Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018., 8645891, Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018, Institute of Electrical and Electronics Engineers Inc., pp. 250-257, 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018, Lyon, France, 09/24/18. https://doi.org/10.1109/CAHPC.2018.8645891

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. / Radulovic, Milan; Asifuzzaman, Kazi; Zivanovic, Darko et al.
Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 250-257 8645891 (Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Pleiter, Dirk

AU - Marazakisl, Manolis

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Radulovic M, Asifuzzaman K, Zivanovic D, Rajovic N, De Verdiere GC, Pleiter D et al. Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. In Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 250-257. 8645891. (Proceedings - 2018 30th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2018). doi: 10.1109/CAHPC.2018.8645891

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned

Abstract

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Keywords

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