Low noise, low power dissipation analog LSI electronics for heavy ion detectors

C. L. Britton; W. L. Bryan; M. S. Emery; M. N. Ericson; M. S. Musrock; M. L. Simpson; J. W. Walker; A. L. Winterberg; F. Plasil; G. R. Young; M. D. Allen; L. G. Clonts; E. J. Kennedy; R. S. Smith; J. Boissevain; al et al

Low noise, low power dissipation analog LSI electronics for heavy ion detectors

C. L. Britton, W. L. Bryan, M. S. Emery, M. N. Ericson, M. S. Musrock, M. L. Simpson, J. W. Walker, A. L. Winterberg, F. Plasil, G. R. Young, M. D. Allen, L. G. Clonts, E. J. Kennedy, R. S. Smith, J. Boissevain, al et al

Sensors and Electronics

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

The work performed to date for the Multiplicity-Vertex Detector (MVD) for the PHENIX detector collaboration at the Relativistic Heavy Ion Collider (RHIC) is presented in this paper. Composed of approximately 34,000 channels of both silicon strips and silicon pads, the detector per-channel signal processing chain consists of a preamplifier-gain stage, a current-mode summed multiplicity discriminator, a 64-deep analog memory (simultaneous read-write), an analog correlator and a 10-bit 5 μs ADC. All timing control, data buffering, and data formatting for a single 256-channel multi-chip module (MCM) is performed by the system controller or Heap Manager. Each chip set is partitioned into 32-channel sets. Prototype performance for the various blocks will be presented as well as the ionizing radiation damage performance of the 1.2 μ nwell CMOS process used for fabrication.

Original language	English
Pages (from-to)	133-136
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
State	Published - 1996
Event	Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA Duration: May 12 1996 → May 15 1996

Cite this

Britton, C. L., Bryan, W. L., Emery, M. S., Ericson, M. N., Musrock, M. S., Simpson, M. L., Walker, J. W., Winterberg, A. L., Plasil, F., Young, G. R., Allen, M. D., Clonts, L. G., Kennedy, E. J., Smith, R. S., Boissevain, J., & et al, A. (1996). Low noise, low power dissipation analog LSI electronics for heavy ion detectors. Proceedings - IEEE International Symposium on Circuits and Systems, 1, 133-136.

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title = "Low noise, low power dissipation analog LSI electronics for heavy ion detectors",

abstract = "The work performed to date for the Multiplicity-Vertex Detector (MVD) for the PHENIX detector collaboration at the Relativistic Heavy Ion Collider (RHIC) is presented in this paper. Composed of approximately 34,000 channels of both silicon strips and silicon pads, the detector per-channel signal processing chain consists of a preamplifier-gain stage, a current-mode summed multiplicity discriminator, a 64-deep analog memory (simultaneous read-write), an analog correlator and a 10-bit 5 μs ADC. All timing control, data buffering, and data formatting for a single 256-channel multi-chip module (MCM) is performed by the system controller or Heap Manager. Each chip set is partitioned into 32-channel sets. Prototype performance for the various blocks will be presented as well as the ionizing radiation damage performance of the 1.2 μ nwell CMOS process used for fabrication.",

author = "Britton, {C. L.} and Bryan, {W. L.} and Emery, {M. S.} and Ericson, {M. N.} and Musrock, {M. S.} and Simpson, {M. L.} and Walker, {J. W.} and Winterberg, {A. L.} and F. Plasil and Young, {G. R.} and Allen, {M. D.} and Clonts, {L. G.} and Kennedy, {E. J.} and Smith, {R. S.} and J. Boissevain and {et al}, al",

year = "1996",

language = "English",

volume = "1",

pages = "133--136",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

note = "Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) ; Conference date: 12-05-1996 Through 15-05-1996",

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Britton, CL, Bryan, WL, Emery, MS, Ericson, MN, Musrock, MS, Simpson, ML, Walker, JW, Winterberg, AL, Plasil, F, Young, GR, Allen, MD, Clonts, LG, Kennedy, EJ, Smith, RS, Boissevain, J & et al, A 1996, 'Low noise, low power dissipation analog LSI electronics for heavy ion detectors', Proceedings - IEEE International Symposium on Circuits and Systems, vol. 1, pp. 133-136.

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T1 - Low noise, low power dissipation analog LSI electronics for heavy ion detectors

AU - Britton, C. L.

AU - Bryan, W. L.

AU - Emery, M. S.

AU - Ericson, M. N.

AU - Musrock, M. S.

AU - Simpson, M. L.

AU - Walker, J. W.

AU - Winterberg, A. L.

AU - Plasil, F.

AU - Young, G. R.

AU - Allen, M. D.

AU - Clonts, L. G.

AU - Kennedy, E. J.

AU - Smith, R. S.

AU - Boissevain, J.

AU - et al, al

PY - 1996

Y1 - 1996

N2 - The work performed to date for the Multiplicity-Vertex Detector (MVD) for the PHENIX detector collaboration at the Relativistic Heavy Ion Collider (RHIC) is presented in this paper. Composed of approximately 34,000 channels of both silicon strips and silicon pads, the detector per-channel signal processing chain consists of a preamplifier-gain stage, a current-mode summed multiplicity discriminator, a 64-deep analog memory (simultaneous read-write), an analog correlator and a 10-bit 5 μs ADC. All timing control, data buffering, and data formatting for a single 256-channel multi-chip module (MCM) is performed by the system controller or Heap Manager. Each chip set is partitioned into 32-channel sets. Prototype performance for the various blocks will be presented as well as the ionizing radiation damage performance of the 1.2 μ nwell CMOS process used for fabrication.

AB - The work performed to date for the Multiplicity-Vertex Detector (MVD) for the PHENIX detector collaboration at the Relativistic Heavy Ion Collider (RHIC) is presented in this paper. Composed of approximately 34,000 channels of both silicon strips and silicon pads, the detector per-channel signal processing chain consists of a preamplifier-gain stage, a current-mode summed multiplicity discriminator, a 64-deep analog memory (simultaneous read-write), an analog correlator and a 10-bit 5 μs ADC. All timing control, data buffering, and data formatting for a single 256-channel multi-chip module (MCM) is performed by the system controller or Heap Manager. Each chip set is partitioned into 32-channel sets. Prototype performance for the various blocks will be presented as well as the ionizing radiation damage performance of the 1.2 μ nwell CMOS process used for fabrication.

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M3 - Conference article

AN - SCOPUS:0029710293

SN - 0271-4310

VL - 1

SP - 133

EP - 136

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4)

Y2 - 12 May 1996 through 15 May 1996

ER -

Low noise, low power dissipation analog LSI electronics for heavy ion detectors

Abstract

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