Lock-free parallel algorithms: An experimental study

Guojing Cong, David Bader

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

Lock-free shared data structures in the setting of distributed computing have received a fair amount of attention. Major motivations of lock-free data structures include increasing fault tolerance of a (possibly heterogeneous) system and alleviating the problems associated with critical sections such as priority inversion and deadlock. For parallel computers with tightly-coupled processors and shared memory, these issues are no longer major concerns. While many of the results are applicable especially when the model used is shared memory multi-processors, no prior studies have considered improving the performance of a parallel implementation by way of lock-free programming. As a matter of fact, often times in practice lock-free data structures in a distributed setting do not perform as well as those that use locks. As the data structures and algorithms for parallel computing are often drastically different from those in distributed computing, it is possible that lock-free programs perform better. In this paper we compare the similarity and difference of lock-free programming in both distributed and parallel computing environments and explore the possibility of adapting lock-free programming to parallel computing to improve performance. Lock-free programming also provides a new way of simulating PRAM and asynchronous PRAM algorithms on current parallel machines.

Original languageEnglish
Pages (from-to)516-527
Number of pages12
JournalLecture Notes in Computer Science
Volume3296
DOIs
StatePublished - 2004
Externally publishedYes

Funding

★ This work was supported in part by NSF Grants CAREER ACI-00-93039, ITR ACI-00-81404, DEB-99-10123, ITR EIA-01-21377, Biocomplexity DEB-01-20709, and ITR EF/BIO 03-31654; and DARPA Contract NBCH30390004.

FundersFunder number
National Science FoundationACI-00-93039, ITR EIA-01-21377, DEB-99-10123, DEB-01-20709, ITR ACI-00-81404, ITR EF/BIO 03-31654
Defense Advanced Research Projects AgencyNBCH30390004

    Keywords

    • High-Performance Algorithm Engineering
    • Lock-free Data Structures
    • Parallel Algorithms
    • Shared Memory

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