Abstract
Power semiconductor die placement on substrates used in high-power modules is generally optimized to minimize electrical parasitic (e.g., stray inductance, common-mode capacitance), taking into account the minimum spacing between semiconductor dies for thermal decoupling. The layout assumes sufficient heat spreading and transfer from dies to the cooling structure. Insulated metal substrate-based power module designs may lead to asymmetrical thermal resistance across the dies, which may cause significant temperature differences among the devices. Such unintentional thermal asymmetries can lead to oversizing the cooling system design or underusing the semiconductor power processing capability. This article proposes a thermal imbalance mitigation method that uses evolutionary optimized liquid-cooled heat sinks to improve the thermal loading among devices.
Original language | English |
---|---|
Article number | 021103 |
Journal | Journal of Electronic Packaging, Transactions of the ASME |
Volume | 144 |
Issue number | 2 |
DOIs | |
State | Published - Jun 2022 |
Funding
This paper has been authored by UT-Battelle LLC under Contract DE-AC05-00OR22725 with the U.S. Department of Energy (DOE). DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan.2
Funders | Funder number |
---|---|
U.S. Department of Energy | |
UT-Battelle | DE-AC05-00OR22725 |