TY - GEN
T1 - Liquid-cooled heat sink optimization for thermal imbalance mitigation in wide-bandgap power modules
AU - Sahu, Raj
AU - Gurpinar, Emre
AU - Ozpineci, Burak
N1 - Publisher Copyright:
Copyright © 2020 ASME.
PY - 2020
Y1 - 2020
N2 - Power semiconductor die layout in substrates used in power modules is generally optimized for minimum electrical parasitics (e.g., stray inductance) by considering the minimum spacing between dies for thermal decoupling. The layout assumes sufficient heat spreading and transfer from dies to the cooling structure. For module designs using a direct substrate cooling method, the base plate is removed, leading to a steady-state thermal asymmetry in the power module due to insufficient heat spreading/transfer. This causes significant temperature differences among the devices. Such unintentional thermal asymmetries can lead to undesirable asymmetries in power conversion among semiconductor devices, which impact reliability. This article proposes a thermal imbalance mitigation method that uses evolutionary optimized liquid-cooled heat sinks to improve the thermal loading among devices.
AB - Power semiconductor die layout in substrates used in power modules is generally optimized for minimum electrical parasitics (e.g., stray inductance) by considering the minimum spacing between dies for thermal decoupling. The layout assumes sufficient heat spreading and transfer from dies to the cooling structure. For module designs using a direct substrate cooling method, the base plate is removed, leading to a steady-state thermal asymmetry in the power module due to insufficient heat spreading/transfer. This causes significant temperature differences among the devices. Such unintentional thermal asymmetries can lead to undesirable asymmetries in power conversion among semiconductor devices, which impact reliability. This article proposes a thermal imbalance mitigation method that uses evolutionary optimized liquid-cooled heat sinks to improve the thermal loading among devices.
UR - http://www.scopus.com/inward/record.url?scp=85098331997&partnerID=8YFLogxK
U2 - 10.1115/IPACK2020-2516
DO - 10.1115/IPACK2020-2516
M3 - Conference contribution
AN - SCOPUS:85098331997
T3 - ASME 2020 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2020
BT - ASME 2020 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2020
PB - American Society of Mechanical Engineers
T2 - ASME 2020 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2020
Y2 - 27 October 2020 through 29 October 2020
ER -