Laser thermal induced crystallization for 20 nm device structures

Shenzhi Yang; Michael O. Thompson

doi:10.1557/proc-669-j7.4

Laser thermal induced crystallization for 20 nm device structures

Shenzhi Yang
, Michael O. Thompson

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

The melt kinetics of shallow junction formation by laser thermal processes has been studied using transient conductance measurements. The melt and solidification dynamics of 20 nm amorphous layers were measured and shown to follow behaviors predicated by deeper melts, including explosive crystallization and interface bounce back. The effects of surface barrier oxides and metal absorber layers, required for CMOS process integration, were examined and shown to be nearly negligible. Quantitative evaluation of a device process window by these measurements was in good agreement with sheet resistance results. Finally, the effect of the buried oxide in SOI structures was investigated. Solidification velocities in such structures were reduced by a factor of three as compared with bulk silicon.

Original language	English
Pages (from-to)	J741-J746
Journal	Materials Research Society Symposium - Proceedings
Volume	669
DOIs	https://doi.org/10.1557/proc-669-j7.4
State	Published - 2001
Externally published	Yes
Event	Si Front-end Processing - Physics and Technology of Dopant-Defect Interactions III - San Francisco, CA, United States Duration: Apr 17 2001 → Apr 19 2001

Funding

Support for this work was provided through the Front End Processing Center of the Semiconductor Research Corporation. Work was performed in the Cornell Nanofabrication Facility (a member of the National Nanofabrication Users Network), supported by NSF under Grant ECS-9731293, Cornell University and industrial affiliates. We would also like to Verdant Technologies (Ultratech) for their financial support and use of facilities in this work.

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10.1557/proc-669-j7.4

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title = "Laser thermal induced crystallization for 20 nm device structures",

abstract = "The melt kinetics of shallow junction formation by laser thermal processes has been studied using transient conductance measurements. The melt and solidification dynamics of 20 nm amorphous layers were measured and shown to follow behaviors predicated by deeper melts, including explosive crystallization and interface bounce back. The effects of surface barrier oxides and metal absorber layers, required for CMOS process integration, were examined and shown to be nearly negligible. Quantitative evaluation of a device process window by these measurements was in good agreement with sheet resistance results. Finally, the effect of the buried oxide in SOI structures was investigated. Solidification velocities in such structures were reduced by a factor of three as compared with bulk silicon.",

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year = "2001",

doi = "10.1557/proc-669-j7.4",

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AU - Yang, Shenzhi

AU - Thompson, Michael O.

PY - 2001

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N2 - The melt kinetics of shallow junction formation by laser thermal processes has been studied using transient conductance measurements. The melt and solidification dynamics of 20 nm amorphous layers were measured and shown to follow behaviors predicated by deeper melts, including explosive crystallization and interface bounce back. The effects of surface barrier oxides and metal absorber layers, required for CMOS process integration, were examined and shown to be nearly negligible. Quantitative evaluation of a device process window by these measurements was in good agreement with sheet resistance results. Finally, the effect of the buried oxide in SOI structures was investigated. Solidification velocities in such structures were reduced by a factor of three as compared with bulk silicon.

AB - The melt kinetics of shallow junction formation by laser thermal processes has been studied using transient conductance measurements. The melt and solidification dynamics of 20 nm amorphous layers were measured and shown to follow behaviors predicated by deeper melts, including explosive crystallization and interface bounce back. The effects of surface barrier oxides and metal absorber layers, required for CMOS process integration, were examined and shown to be nearly negligible. Quantitative evaluation of a device process window by these measurements was in good agreement with sheet resistance results. Finally, the effect of the buried oxide in SOI structures was investigated. Solidification velocities in such structures were reduced by a factor of three as compared with bulk silicon.

UR - https://www.scopus.com/pages/publications/0035556429

U2 - 10.1557/proc-669-j7.4

DO - 10.1557/proc-669-j7.4

M3 - Conference article

AN - SCOPUS:0035556429

SN - 0272-9172

VL - 669

SP - J741-J746

JO - Materials Research Society Symposium - Proceedings

JF - Materials Research Society Symposium - Proceedings

T2 - Si Front-end Processing - Physics and Technology of Dopant-Defect Interactions III

Y2 - 17 April 2001 through 19 April 2001

ER -

Laser thermal induced crystallization for 20 nm device structures

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