Language-Based Optimizations for Persistence on Nonvolatile Main Memory Systems

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Abstract

Substantial advances in nonvolatile memory (NVM) technologies have motivated wide-spread integration of NVM into mobile, enterprise, and HPC systems. Recently, considerable research has focused on architectural integration of NVM and respective programming systems, exploiting NVM's trait of persistence correctly and efficiently. In this regard, we design several novel language-based optimization techniques for programming NVM and demonstrate them as an extension of our NVL-C system. Specifically, we focus on optimizing the performance of atomic updates to complex data structures residing in NVM. We build on two variants of automatic undo logging: Canonical undo logging, and shadow updates. We show these techniques can be implemented transparently and efficiently, using dynamic selection and other logging optimizations. Our empirical results on several applications gathered on an NVM testbed illustrate that our cost-model-based dynamic selection technique can accurately choose the best logging variant across different NVM modes and input sizes. In comparison to statically choosing canonical undo logging, this improvement reduces execution time to as little as 53% for block-addressable NVM and 73% for emulated byte-addressable NVM on a Fusion-io ioScale device.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium, IPDPS 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1163-1173
Number of pages11
ISBN (Electronic)9781538639146
DOIs
StatePublished - Jun 30 2017
Event31st IEEE International Parallel and Distributed Processing Symposium, IPDPS 2017 - Orlando, United States
Duration: May 29 2017Jun 2 2017

Publication series

NameProceedings - 2017 IEEE 31st International Parallel and Distributed Processing Symposium, IPDPS 2017

Conference

Conference31st IEEE International Parallel and Distributed Processing Symposium, IPDPS 2017
Country/TerritoryUnited States
CityOrlando
Period05/29/1706/2/17

Funding

We thank FusionIO (now Western Digital/SanDisk) for testbed equipment, and Philip Roth (ORNL) for administering the testbed. This material is based upon work supported by the U.S. Department of Energy (DOE), Office of Science, Office of Advanced Scientific Computing Research. This manuscript has been authored by UT-Battelle, LLC under Contract No. DE-AC05-00OR22725 with the DOE. The United States Government (USG) retains and the publisher, by accepting the article for publication, acknowledges that the USG retains a non-exclusive, paid-up, irrevocable, world-wide license to publish or reproduce the published form of this manuscript, or allow others to do so, for USG purposes. The DOE will provide public access to these results of federally sponsored research in accordance with the DOE Public Access Plan.

FundersFunder number
U.S. Department of Energy
United States-Japan Foundation
New York Public Library
Office of Science
Advanced Scientific Computing Research
Oak Ridge National Laboratory
CelgardDE-AC05-00OR22725
Western University

    Keywords

    • LLVM
    • NVL-C
    • SSD
    • compilers
    • cost modeling
    • flash
    • language-based optimizations
    • non-volatile memory
    • persistent memory
    • software transactional memory

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