Interconnect thermal management of high power packaged electronic architectures

Jason T. Cook, Yogendra K. Joshi, Ravi Doraiswami

Research output: Contribution to journalConference articlepeer-review

5 Scopus citations

Abstract

The trend in both the computing and electronic industries is to reduce the size of the electronic components while increasing both their performance and capability. Innovative thermal management schemes are needed in order to reduce the impact of the thermal loads. Most of the current electronic components are packaged in a plastic or ceramic container to provide chip and electrical lead protection. Both of these packaging materials have low thermal conductivity, making heat removal from the chip difficult. Thus, heat transfer through the off-chip metal interconnects offers an additional heat removal path. Ball grid array (EGA) interconnects provide an efficient means to connecting packaged high performance chips to printed circuit boards (PCB). As area array bump density increases, reducing Joule heating and electromigration will play an important role in chip and interconnect reliability. Among the many types of interconnects, solder balls offer an efficient means of connecting a chip or package to a PCB. Direct cooling of the solder balls is a new approach to removing heat from packaged chips. Jet impingement presents a unique solution for cooling the solder balls. Thermal and computational fluid dynamic (CFD) modeling of a plastic ball grid array (PBGA) package has demonstrated a significant decrease in temperature across the chip, package, and solder balls, when using jet impingement cooling.

Original languageEnglish
Pages (from-to)30-37
Number of pages8
JournalAnnual IEEE Semiconductor Thermal Measurement and Management Symposium
Volume20
StatePublished - 2004
Externally publishedYes
Event20th Annual IEEE Semiconductor Thermal Measurement and Management Symposium - Proceedings 2004 - San Jose, CA., United States
Duration: Mar 9 2004Mar 11 2004

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