Instruction set architectures for quantum processing units

Keith A. Britt, Travis S. Humble

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Progress in quantum computing hardware raises questions about how these devices can be controlled, programmed, and integrated with existing computational workflows. We briefly describe several prominent quantum computational models, their associated quantum processing units (QPUs), and the adoption of these devices as accelerators within high-performance computing systems. Emphasizing the interface to the QPU, we analyze instruction set architectures based on reduced and complex instruction sets, i.e., RISC and CISC architectures. We clarify the role of conventional constraints on memory addressing and instruction widths within the quantum computing context. Finally, we examine existing quantum computing platforms, including the D-Wave 2000Q and IBM Quantum Experience, within the context of future ISA development and HPC needs.

Original languageEnglish
Title of host publicationHigh Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Revised Selected Papers
EditorsRio Yokota, Julian M. Kunkel, Michela Taufer, John Shalf
PublisherSpringer Verlag
Pages98-105
Number of pages8
ISBN (Print)9783319676296
DOIs
StatePublished - 2017
Event32nd International Conference on High Performance Computing, ISC High Performance 2017 - Frankfurt, Germany
Duration: Jun 18 2017Jun 22 2017

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume10524 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference32nd International Conference on High Performance Computing, ISC High Performance 2017
Country/TerritoryGermany
CityFrankfurt
Period06/18/1706/22/17

Keywords

  • Accelerator
  • Instruction set architecture
  • Quantum
  • qubit

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