TY - JOUR
T1 - In-situ stress and warpage measurements to investigate reliability of flip-chip on board assembly without underfill
AU - Bansal, S.
AU - Raj, P. Markondeya
AU - Shinotani, K.
AU - Bhattacharya, S.
AU - Tummala, R.
AU - Lance, M. J.
PY - 2003
Y1 - 2003
N2 - Current printed wiring boards (PWBs) are all organic, the most common being epoxy-glass laminate FR-4 due to its cost effectiveness and overall performance. However, for high-density wiring (HDW) and assembly of flip-chips directly to the substrate without the use of underfill, substrate materials with low CTE and high elastic modulus are needed. Novel low CTE-high stiffness organic and inorganic boards have been evaluated for flip-chip on board technology without the use of underfill. Standard liquid-liquid thermal shock tests were carried out on test vehicles with different board materials and failure modes were characterized. In-situ warpage and stress measurements were made to analyze the observed failure modes and to set guidelines for optimal board material selection. The effect of interlayer dielectric thickness on the package reliability has also been studied. The reliability test results are in accordance with the inferences from the in-situ warpage and stress measurements and it can be concluded that along with low CTE, high modulus is an inevitable substrate property requirement for flip-chip reliability without underfill in next-generation packages. This paper also presents Photo-stimulated Luminescence Spectroscopy (PSLS) and Raman Spectroscopy as non-destructive and direct techniques for the in-situ and residual stress measurement in microsystems and thus a powerful means for reliability assessment. Experimental results have also been supported by finite element models and analytical solutions.
AB - Current printed wiring boards (PWBs) are all organic, the most common being epoxy-glass laminate FR-4 due to its cost effectiveness and overall performance. However, for high-density wiring (HDW) and assembly of flip-chips directly to the substrate without the use of underfill, substrate materials with low CTE and high elastic modulus are needed. Novel low CTE-high stiffness organic and inorganic boards have been evaluated for flip-chip on board technology without the use of underfill. Standard liquid-liquid thermal shock tests were carried out on test vehicles with different board materials and failure modes were characterized. In-situ warpage and stress measurements were made to analyze the observed failure modes and to set guidelines for optimal board material selection. The effect of interlayer dielectric thickness on the package reliability has also been studied. The reliability test results are in accordance with the inferences from the in-situ warpage and stress measurements and it can be concluded that along with low CTE, high modulus is an inevitable substrate property requirement for flip-chip reliability without underfill in next-generation packages. This paper also presents Photo-stimulated Luminescence Spectroscopy (PSLS) and Raman Spectroscopy as non-destructive and direct techniques for the in-situ and residual stress measurement in microsystems and thus a powerful means for reliability assessment. Experimental results have also been supported by finite element models and analytical solutions.
UR - http://www.scopus.com/inward/record.url?scp=0037674991&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:0037674991
SN - 0569-5503
SP - 148
EP - 155
JO - Proceedings - Electronic Components and Technology Conference
JF - Proceedings - Electronic Components and Technology Conference
T2 - 53rd Electronic Components and Technology Conference 2003
Y2 - 27 May 2003 through 30 May 2003
ER -