Improved Bus Clamping PWM Schemes for Modular Multilevel Converters With Reduced Switching Losses and Capacitor Voltage Ripple

Sinusoidal pulsewidth modulation (PWM) is commonly used in modular multilevel converters (MMCs). However, it results in high switching losses, leading to reduced efficiency. This article proposes adjustable bus clamping (ABC) modulation schemes to enhance the performance of MMCs. In these schemes, a common-mode signal is injected into the modulation signal to clamp the arm voltage to the positive or negative dc bus for a specified duration. Theoretical analysis reveals that adjusting the clamping location can effectively minimize capacitor voltage ripple and switching losses. Furthermore, the impact of PWM comparison logic on circulating currents is analyzed, resulting in the development of hybrid ABC schemes to further improve MMC performance. Comprehensive experimental validation demonstrates the efficacy of the proposed schemes, achieving reductions of 23.20% in capacitor voltage ripple, 24.84% in peak-to-peak circulating currents, and 41.18% in switching losses, alongside a 1.3% improvement in efficiency at unity power factor compared with sinusoidal PWM.