Hybrid checkpointing for MPI jobs in HPC environments

Chao Wang, Frank Mueller, Christian Engelmann, Stephen L. Scott

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

38 Scopus citations

Abstract

As the core count in high-performance computing systems keeps increasing, faults are becoming common place. Check pointing addresses such faults but captures full process images even though only a subset of the process image changes between checkpoints. We have designed a hybrid check pointing technique for MPI tasks of high-performance applications. This technique alternates between full and incremental checkpoints: At incremental checkpoints, only data changed since the last checkpoint is captured. Our implementation integrates new BLCR and LAM/MPI features that complement traditional full checkpoints. This results in significantly reduced checkpoint sizes and overheads with only moderate increases in restart overhead. After accounting for cost and savings, benefits due to incremental checkpoints are an order of magnitude larger than overheads on restarts. We further derive qualitative results indicating an optimal balance between full/incremental checkpoints of our novel approach at a ratio of 1:9, which outperforms both always-full and always-incremental check pointing.

Original languageEnglish
Title of host publicationProceedings - 16th International Conference on Parallel and Distributed Systems, ICPADS 2010
Pages524-533
Number of pages10
DOIs
StatePublished - 2010
Event16th IEEE International Conference on Parallel and Distributed Systems, ICPADS 2010 - Shanghai, China
Duration: Dec 8 2010Dec 10 2010

Publication series

NameProceedings of the International Conference on Parallel and Distributed Systems - ICPADS
ISSN (Print)1521-9097

Conference

Conference16th IEEE International Conference on Parallel and Distributed Systems, ICPADS 2010
Country/TerritoryChina
CityShanghai
Period12/8/1012/10/10

Keywords

  • Checkpoint/restart
  • Fault tolerance
  • High-performance computing

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