Abstract
The high performance computing Challenge (HPCC) benchmark suite was initially developed for the defense advanced research projects agency's (DARPA) high productivity computing systems (HPCS) program to provide a set of standardized hardware probes based on commonly occurring computational software kernels. HPCC was designed to approximately bound computations of high and low spatial and temporal locality. In addition, because the HPCC tests consist of simple mathematical operations, this provides a unique opportunity to look at language and parallel programming model issues. The HPCC rules allow only standard system compilers and libraries to be used through their supported and documented interface and the build procedure should be described at submission time. Looking forward into the High End Computing hardware trends, HPCC has a role to play in testing supercomputer installations that draw the majority of their performance from hardware accelerators. The trend started with TOP500's first Peta-FLOP computer: Roadrunner based on IBM Cell processors.
| Original language | English |
|---|---|
| Title of host publication | Contemporary High Performance Computing |
| Subtitle of host publication | From Petascale toward Exascale |
| Publisher | CRC Press |
| Pages | 13-30 |
| Number of pages | 18 |
| ISBN (Electronic) | 9781466568358 |
| ISBN (Print) | 9781466568341 |
| State | Published - Jan 1 2013 |
| Externally published | Yes |