High Temperature DC Characterization of Fully-Depleted 0.5μm SOS-CMOS MOSFETs for Analog Circuit Design

M. N. Ericson, C. L. Britton, J. M. Rochelle, B. J. Blalock, B. D. Williamson, R. L. Greenwell, R. Schultz

Research output: Contribution to conferencePaperpeer-review

Abstract

Extensive characterization results of MOSFET small-signal parameters over temperature (25° to 300°C) are presented for low-VT transistors fabricated in a SOS 0.5-μm process. Low-VT devices such as these are particularly useful for low-voltage, low-power (LVLP) analog applications. Small-signal dc parameters critical in analog circuit design are reported including device transconductance efficiency (gm/I d), output resistance (rds), and threshold voltage (V T). These parameters are summarized as a function of both gate length (0.5μm to 16μm) and temperature. Inversion coefficient representation is employed for data presentation and analysis. This work provides the most thorough presentation of SOS MOSFET dc parameters as a function of both gate length and temperature to date. In addition, this work summarizes device information essential for successful high-temperature SOS-CMOS analog circuit design.

Original languageEnglish
Pages89-91
Number of pages3
StatePublished - 2003
Event2003 IEEE International SOI Conference Proceedings - Newport Beach, CA, United States
Duration: Sep 29 2003Oct 2 2003

Conference

Conference2003 IEEE International SOI Conference Proceedings
Country/TerritoryUnited States
CityNewport Beach, CA
Period09/29/0310/2/03

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