High performance top-gated multilayer WSe2 field effect transistors

Pushpa Raj Pudasaini, Michael G. Stanford, Akinola Oyedele, Anthony T. Wong, Anna N. Hoffman, Dayrl P. Briggs, Kai Xiao, David G. Mandrus, Thomas Z. Ward, Philip D. Rack

Research output: Contribution to journalArticlepeer-review

34 Scopus citations

Abstract

In this paper, high performance top-gated WSe2 field effect transistor (FET) devices are demonstrated via a two-step remote plasma assisted ALD process. High-quality, low-leakage aluminum oxide (Al2O3) gate dielectric layers are deposited onto the WSe2 channel using a remote plasma assisted ALD process with an ultrathin (∼1 nm) titanium buffer layer. The first few nanometers (∼2 nm) of the Al2O3 dielectric film is deposited at relatively low temperature (i.e. 50 °C) and remainder of the film is deposited at 150 °C to ensure the conformal coating of Al2O3 on the WSe2 surface. Additionally, an ultra-thin titanium buffer layer is introduced at the WSe2 channel surface prior to ALD process to mitigate oxygen plasma induced doping effects. Excellent device characteristics with current on-off ratio in excess of 106 and a field effect mobility as high as 70.1 cm2 V-1 s-1 are achieved in a few-layer WSe2 FET device with a 30 nm Al2O3 top-gate dielectric. With further investigation and careful optimization, this method can play an important role for the realization of high performance top gated FETs for future optoelectronic device applications.

Original languageEnglish
Article number475202
JournalNanotechnology
Volume28
Issue number47
DOIs
StatePublished - Oct 31 2017

Funding

PDR and MGS acknowledge support by US Department of Energy (DOE) under Grant No. DOE DE-SC0002136. PRP and DM acknowledge funding by the Gordon and Betty Moore Foundation’s EPiQS Initiative through Grant GBMF4416. TZW acknowledges support US Department of Energy (DOE), Office of Basic Energy Sciences (BES), Materials Sciences and Engineering Division. The authors acknowledge that the device synthesis, Raman mapping were conducted at the Center for Nanophase Materials Sciences, which is a DOE Office of Science User Facility. Competing financial interests The authors declare no competing financial interests.

Keywords

  • Transition metal dichalcogenide
  • atomic layer deposition
  • field effect transistors
  • high k-dielectrics
  • interface engineering

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