Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage

Abdul Basit Mirza; Asif Imran Emon; Kushan Choksi; Sama Salehi Vala; Fang Luo; Radha Krishna Moorthy; Madhu Sudhan Chinthavali

doi:10.1109/APEC43580.2023.10131647

Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage

Abdul Basit Mirza, Asif Imran Emon, Kushan Choksi, Sama Salehi Vala, Fang Luo, Radha Krishna Moorthy, Madhu Sudhan Chinthavali

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

12 Scopus citations

Abstract

With a vision to increase power density and standardize power electronics interface with the grid, this paper presents the design and validation of a SiC-based 75 kVA Intelligent Power Stage (IPS), comprising DC-DC and DC-AC power stages. The IPS is built on a modular 3D structure platform, where all three sides of the heat sink are utilized to achieve high power density (5.5 kW/L), including passives. The heat sink is custom-built and optimized to channel power from all three sides. Moreover, the intelligent features involve online non-invasive health monitoring of power stage components through a pseudo-optimized Digital Twin (DT) approach. DT also aids in identifying system failure modes, providing an extra layer of protection. Lastly, for grid-tie operation and interoperability, a hierarchical controller Smart Universal Power Electronics Regulator (SUPER) is proposed, which controls the DC-AC stage and monitors the health of IPS components through control and data communication channels.

Original language	English
Title of host publication	APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	977-983
Number of pages	7
ISBN (Electronic)	9781665475396
DOIs	https://doi.org/10.1109/APEC43580.2023.10131647
State	Published - 2023
Event	38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023 - Orlando, United States Duration: Mar 19 2023 → Mar 23 2023

Publication series

Name	Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume	2023-March

Conference

Conference	38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023
Country/Territory	United States
City	Orlando
Period	03/19/23 → 03/23/23

Funding

ACKNOWLEDGMENT This work was supported by Oak Ridge National Laboratory (ORNL) funded through the Department of Energy (DOE) -Office of Electricity’s (OE), Transformer Resilience and Advanced Components (TRAC) program led by the program manager Andre Pereira. The authors would also like to acknowledge the National Science Foundation (NSF Award No. 1846917) for lending financial support for this work.

Keywords

3-D Packaging
Digital Twin (DT)
Intelligent Power Stage (IPS)
Particle Swarm Optimization (PSO)
SiC
Split-Phase Inverter
Three-Faced Utilized Heat Sink

Access to Document

10.1109/APEC43580.2023.10131647

Cite this

Mirza, A. B., Emon, A. I., Choksi, K., Vala, S. S., Luo, F., Moorthy, R. K., & Chinthavali, M. S. (2023). Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage. In APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition (pp. 977-983). (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2023-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APEC43580.2023.10131647

Mirza, Abdul Basit ; Emon, Asif Imran ; Choksi, Kushan et al. / Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage. APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2023. pp. 977-983 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

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abstract = "With a vision to increase power density and standardize power electronics interface with the grid, this paper presents the design and validation of a SiC-based 75 kVA Intelligent Power Stage (IPS), comprising DC-DC and DC-AC power stages. The IPS is built on a modular 3D structure platform, where all three sides of the heat sink are utilized to achieve high power density (5.5 kW/L), including passives. The heat sink is custom-built and optimized to channel power from all three sides. Moreover, the intelligent features involve online non-invasive health monitoring of power stage components through a pseudo-optimized Digital Twin (DT) approach. DT also aids in identifying system failure modes, providing an extra layer of protection. Lastly, for grid-tie operation and interoperability, a hierarchical controller Smart Universal Power Electronics Regulator (SUPER) is proposed, which controls the DC-AC stage and monitors the health of IPS components through control and data communication channels.",

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Mirza, AB, Emon, AI, Choksi, K, Vala, SS, Luo, F, Moorthy, RK & Chinthavali, MS 2023, Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage. in APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, vol. 2023-March, Institute of Electrical and Electronics Engineers Inc., pp. 977-983, 38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023, Orlando, United States, 03/19/23. https://doi.org/10.1109/APEC43580.2023.10131647

Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage. / Mirza, Abdul Basit; Emon, Asif Imran; Choksi, Kushan et al.
APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2023. p. 977-983 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2023-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Moorthy, Radha Krishna

AU - Chinthavali, Madhu Sudhan

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AB - With a vision to increase power density and standardize power electronics interface with the grid, this paper presents the design and validation of a SiC-based 75 kVA Intelligent Power Stage (IPS), comprising DC-DC and DC-AC power stages. The IPS is built on a modular 3D structure platform, where all three sides of the heat sink are utilized to achieve high power density (5.5 kW/L), including passives. The heat sink is custom-built and optimized to channel power from all three sides. Moreover, the intelligent features involve online non-invasive health monitoring of power stage components through a pseudo-optimized Digital Twin (DT) approach. DT also aids in identifying system failure modes, providing an extra layer of protection. Lastly, for grid-tie operation and interoperability, a hierarchical controller Smart Universal Power Electronics Regulator (SUPER) is proposed, which controls the DC-AC stage and monitors the health of IPS components through control and data communication channels.

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Mirza AB, Emon AI, Choksi K, Vala SS, Luo F, Moorthy RK et al. Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage. In APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc. 2023. p. 977-983. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC). doi: 10.1109/APEC43580.2023.10131647

Hardware Design and Implementation of a 75 kVA 3-D Integrated Intelligent Power Stage

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