GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap

Hartwig Anzt; Eduardo Ponce; Gregory D. Peterson; Jack Dongarra

doi:10.1145/2834899.2834907

GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap

Hartwig Anzt, Eduardo Ponce, Gregory D. Peterson, Jack Dongarra

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

In this paper we present an optimized GPU co-design of the Induced Dimension Reduction (IDR) algorithm for solving linear systems. Starting from a baseline implementation based on the generic BLAS routines from the MAGMA software library, we apply optimizations that are based on kernel fusion and kernel overlap. Runtime experiments are used to investigate the benefit of the distinct optimization techniques for different variants of the IDR algorithm. A comparison to the reference implementation reveals that the interplay between them can succeed in cutting the overall runtime by up to about one third.

Original language	English
Title of host publication	Proceedings of Co-HPC 2015
Subtitle of host publication	2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis
Publisher	Association for Computing Machinery, Inc
ISBN (Electronic)	9781450339926
DOIs	https://doi.org/10.1145/2834899.2834907
State	Published - Nov 15 2015
Externally published	Yes
Event	2nd International Workshop on Hardware-Software Co-Design for High Performance Computing, Co-HPC 2015 - Austin, United States Duration: Nov 15 2015 → …

Publication series

Name	Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis

Conference

Conference	2nd International Workshop on Hardware-Software Co-Design for High Performance Computing, Co-HPC 2015
Country/Territory	United States
City	Austin
Period	11/15/15 → …

Funding

This material is based upon work supported by the U.S. Department of Energy (Award Number DE-SC-0010042), and NVIDIA.

Keywords

Co-design
GPU
Induced Dimension Reduction (IDR)
Kernel fusion
Kernel overlap

Access to Document

10.1145/2834899.2834907

Cite this

Anzt, H., Ponce, E., Peterson, G. D., & Dongarra, J. (2015). GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap. In Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis Article 5 (Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis). Association for Computing Machinery, Inc. https://doi.org/10.1145/2834899.2834907

Anzt, Hartwig ; Ponce, Eduardo ; Peterson, Gregory D. et al. / GPU-accelerated co-design of induced dimension reduction : Algorithmic fusion and kernel overlap. Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis. Association for Computing Machinery, Inc, 2015. (Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis).

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title = "GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap",

abstract = "In this paper we present an optimized GPU co-design of the Induced Dimension Reduction (IDR) algorithm for solving linear systems. Starting from a baseline implementation based on the generic BLAS routines from the MAGMA software library, we apply optimizations that are based on kernel fusion and kernel overlap. Runtime experiments are used to investigate the benefit of the distinct optimization techniques for different variants of the IDR algorithm. A comparison to the reference implementation reveals that the interplay between them can succeed in cutting the overall runtime by up to about one third.",

keywords = "Co-design, GPU, Induced Dimension Reduction (IDR), Kernel fusion, Kernel overlap",

author = "Hartwig Anzt and Eduardo Ponce and Peterson, {Gregory D.} and Jack Dongarra",

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year = "2015",

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doi = "10.1145/2834899.2834907",

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Anzt, H, Ponce, E, Peterson, GD & Dongarra, J 2015, GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap. in Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis., 5, Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis, Association for Computing Machinery, Inc, 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing, Co-HPC 2015, Austin, United States, 11/15/15. https://doi.org/10.1145/2834899.2834907

GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap. / Anzt, Hartwig; Ponce, Eduardo; Peterson, Gregory D. et al.
Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis. Association for Computing Machinery, Inc, 2015. 5 (Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Anzt H, Ponce E, Peterson GD, Dongarra J. GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap. In Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis. Association for Computing Machinery, Inc. 2015. 5. (Proceedings of Co-HPC 2015: 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis). doi: 10.1145/2834899.2834907

GPU-accelerated co-design of induced dimension reduction: Algorithmic fusion and kernel overlap

Abstract

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Keywords

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