TY - GEN
T1 - Fixed reference frame phase-locked loop (FRF-PLL) for unbalanced line voltage conditions
AU - Martinez-Montejano, M. F.
AU - Escobar, G.
AU - Torres-Olguin, R. E.
PY - 2008
Y1 - 2008
N2 - In this work a phase-locked loop (PLL) is presented, which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates, and thus the proposed algorithm is referred as fixed reference frame PLL (FRF-PLL). In fact, the FRF-PLL does not require transformation of variables into the synchronous frame coordinates as in most PLL schemes. The design of the FRF-PLL is based on a complete description of the source voltage involving both positive and negative sequences in stationary coordinates and considering the angular frequency as an uncertain parameter. Therefore, the FRF-PLL is intended to perform properly under severe unbalanced conditions, and to be robust against angular frequency variations in the three-phase source voltage signal. Although not considered in the design, it is shown that the scheme is also robust against harmonic distortion present in the source voltage signal.
AB - In this work a phase-locked loop (PLL) is presented, which is able to provide an estimation of the angular frequency, and both the positive and negative sequences of the fundamental component of a three-phase signal. These sequences are provided in fixed reference frame coordinates, and thus the proposed algorithm is referred as fixed reference frame PLL (FRF-PLL). In fact, the FRF-PLL does not require transformation of variables into the synchronous frame coordinates as in most PLL schemes. The design of the FRF-PLL is based on a complete description of the source voltage involving both positive and negative sequences in stationary coordinates and considering the angular frequency as an uncertain parameter. Therefore, the FRF-PLL is intended to perform properly under severe unbalanced conditions, and to be robust against angular frequency variations in the three-phase source voltage signal. Although not considered in the design, it is shown that the scheme is also robust against harmonic distortion present in the source voltage signal.
UR - http://www.scopus.com/inward/record.url?scp=52349109743&partnerID=8YFLogxK
U2 - 10.1109/PESC.2008.4592715
DO - 10.1109/PESC.2008.4592715
M3 - Conference contribution
AN - SCOPUS:52349109743
SN - 9781424416684
T3 - PESC Record - IEEE Annual Power Electronics Specialists Conference
SP - 4723
EP - 4728
BT - PESC '08 - 39th IEEE Annual Power Electronics Specialists Conference - Proceedings
T2 - PESC '08 - 39th IEEE Annual Power Electronics Specialists Conference
Y2 - 15 June 2008 through 19 June 2008
ER -