Exploring hybrid memory for GPU energy efficiency through software-hardware co-design

Bin Wang, Bo Wu, Dong Li, Xipeng Shen, Weikuan Yu, Yizheng Jiao, Jeffrey S. Vetter

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

56 Scopus citations

Abstract

Hybrid memory designs, such as DRAM plus Phase Change Memory (PCM), have shown some promise for alleviating power and density issues faced by traditional memory systems. But previous studies have concentrated on CPU systems with a modest level of parallelism. This work studies the problem in a massively parallel setting. Specifically, it investigates the special implications to hybrid memory imposed by the massive parallelism in GPU. It empirically shows that, contrary to promising results demonstrated for CPU, previous designs of PCM-based hybrid memory result in significant degradation to the energy efficiency of GPU. It reveals that the fundamental reason comes from a multi-facet mismatch between those designs and the massive parallelism in GPU. It presents a solution that centers around a close cooperation between compiler-directed data placement and hardware-assisted runtime adaptation. The co-design approach helps tap into the full potential of hybrid memory for GPU without requiring dramatic hardware changes over previous designs, yielding 6% and 49% energy saving on average compared to pure DRAM and pure PCM respectively, and keeping performance loss less than 2%.

Original languageEnglish
Title of host publicationPACT 2013 - Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
Pages93-102
Number of pages10
DOIs
StatePublished - 2013
Event22nd International Conference on Parallel Architectures and Compilation Techniques, PACT 2013 - Edinburgh, United Kingdom
Duration: Sep 7 2013Sep 11 2013

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
ISSN (Print)1089-795X

Conference

Conference22nd International Conference on Parallel Architectures and Compilation Techniques, PACT 2013
Country/TerritoryUnited Kingdom
CityEdinburgh
Period09/7/1309/11/13

Keywords

  • Co-Design
  • Energy Efficiency
  • GPU
  • NVRAM

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