Abstract
The Scalable HeterOgeneous Computing (SHOC) benchmark suite was released in 2010 as a tool to evaluate the sta- bility and performance of emerging heterogeneous architec- Tures and to compare different programming models for com- pute devices used in those architectures. Since then, high- performance computing (HPC) system architectures have increasingly incorporated both discrete and fused multi-core and many-core processors. The TOP500 list illustrates this trend: heterogeneous systems grew from a 3.4% to 18.0% share of the list between June 2010 and June 2015. Not only are there more heterogeneous systems on the TOP500 list today, those machines are responsible for a dispropor- Tionately large percentage of list's aggregate performance: As of June 2015, the performance share for heterogeneous systems has grown to 33.7%. Part of this shift toward heterogeneous architectures has stemmed from new products in the hardware accelerator market, such as Intel's Xeon Phi coprocessor, and improve- ments in the approaches for programming such accelerators. Existing approaches such as CUDA and OpenCL have be- come more powerful and easy to use, and directive-based programming models such as OpenACC, OpenMP 4.0, and Intel's Language Extensions for Offload (LEO) are rapidly gaining user acceptance. The benefits of these hardware and software advances are not limited to HPC; other problem domains such as \big data" are reaping the rewards also. The original SHOC benchmarks had adequate support for Notice of Copyright CUDA and OpenCL for graphics processing units, but did not support more recent programming models and devices. We extended SHOC to support evaluation of recent het- erogeneous architectures and programming models such as OpenACC and LEO, and we added new benchmarks to in- crease SHOC's application domain coverage. In this pa- per, we describe our modifications to the stock SHOC dis- Tribution and present several examples of using our aug- mented version of SHOC for evaluation of recent heteroge- neous architectures and programming models.
| Original language | English |
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| Title of host publication | Proceedings of the 6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems, PMBS 2015 - Held as part of ACM/IEEE Supercomputing 2015, SC 2015 |
| Publisher | Association for Computing Machinery, Inc |
| ISBN (Electronic) | 9781450340090 |
| DOIs | |
| State | Published - Nov 15 2015 |
| Event | 6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems, PMBS 2015 - Held as part of the 27th ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2015 - TX, United States Duration: Nov 15 2015 → … |
Publication series
| Name | Proceedings of the 6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems, PMBS 2015 - Held as part of ACM/IEEE Supercomputing 2015, SC 2015 |
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Conference
| Conference | 6th International Workshop in Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems, PMBS 2015 - Held as part of the 27th ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2015 |
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| Country/Territory | United States |
| City | TX |
| Period | 11/15/15 → … |
Funding
We thank the original SHOC developers from the Oak Ridge National Laboratory''s Future Technologies Group. We also thank Rezaur Rahman''s group at Intel for their as- sistance in debugging and improving the MIC benchmarks discussed in this paper. This material is based upon work supported by the U.S. Department of Energy, O-ce of Sci- ence, O-ce of Advanced Scienti-c Computing Research and the National Science Foundation.
Keywords
- Accelerators
- Benchmarking
- Performance