Evaluation of a floating-point intensive kernel on FPGA: A case study of geodesic distance kernel

Zheming Jin, Hal Finkel, Kazutomo Yoshii, Franck Cappello

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

Heterogeneous platforms provide a promising solution for high-performance and energy-efficient computing applications. This paper presents our research on usage of heterogeneous platform for a floating-point intensive kernel. We first introduce the floating-point intensive kernel from the geographical information system. Then we analyze the FPGA designs generated by the Intel FPGA SDK for OpenCL, and evaluate the kernel performance and the floating-point error rate of the FPGA designs. Finally, we compare the performance and energy efficiency of the kernel implementations on the Arria 10 FPGA, Intel’s Xeon Phi Knights Landing CPU, and NVIDIA’s Kepler GPU. Our evaluation shows the energy efficiency of the single-precision kernel on the FPGA is 1.35X better than on the CPU and the GPU, while the energy efficiency of the double-precision kernel on the FPGA is 1.36X and 1.72X less than the CPU and GPU, respectively.

Original languageEnglish
Title of host publicationEuro-Par 2017
Subtitle of host publicationParallel Processing Workshops - Euro-Par 2017 International Workshops
EditorsDora B. Heras, Luc Bouge
PublisherSpringer Verlag
Pages664-675
Number of pages12
ISBN (Print)9783319751771
DOIs
StatePublished - 2018
Externally publishedYes
EventInternational Workshops on Parallel Processing, Euro-Par 2017 - Santiago de Compostela, Spain
Duration: Aug 28 2017Aug 29 2017

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume10659 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

ConferenceInternational Workshops on Parallel Processing, Euro-Par 2017
Country/TerritorySpain
CitySantiago de Compostela
Period08/28/1708/29/17

Funding

Acknowledgement. We thank the anonymous reviewers and the shepherd for their comments. This research used resources of the Argonne Leadership Computing Facility, which is a DOE Office of Science User Facility supported under Contract DE-AC02-06CH11357.

Keywords

  • FPGA
  • Floating-point operation
  • HPC
  • OpenCL

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