Evaluating HPC Kernels for Processing in Memory

Kazi Asifuzzaman; Mohammad Alaul Haque Monil; Frank Liu; Jeffrey S. Vetter

doi:10.1145/3565053.3565054

Evaluating HPC Kernels for Processing in Memory

Kazi Asifuzzaman, Mohammad Alaul Haque Monil, Frank Liu, Jeffrey S. Vetter

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

Memory subsystems contribute significantly to the performance and energy efficiency of high-performance computing (HPC) applications. Traditional memory technologies with conventional organization (e.g., DRAM) are struggling to keep up with the increasing memory requirements of modern applications. Techniques such as multilayer cache hierarchy and out-of-order execution are still falling short of mitigating the penalty incurred by memory accesses. Processing-in-memory (PIM), which involves moving memory-intensive kernels to memory for execution instead of bringing the data to the processing unit, is emerging as a promising technique. PIM has recently received traction among computer architecture researchers, and the increasing research activity surrounding this technique indicates its potential to alleviate main memory performance bottlenecks. In this paper, we characterize and identify memory-intensive HPC kernels, perform a first-order evaluation of the PIM technique for selected HPC kernels, quantify performance deviation, and analyze the key factors that affect PIM efficiency.

Original language	English
Title of host publication	MEMSYS 2022 - Proceedings of the International Symposium on Memory Systems
Publisher	Association for Computing Machinery
ISBN (Electronic)	9781450398008
DOIs	https://doi.org/10.1145/3565053.3565054
State	Published - Oct 3 2022
Event	2022 International Symposium on Memory Systems, MEMSYS 2022 - Washington, United States Duration: Oct 3 2022 → Oct 6 2022

Publication series

Name	ACM International Conference Proceeding Series

Conference

Conference	2022 International Symposium on Memory Systems, MEMSYS 2022
Country/Territory	United States
City	Washington
Period	10/3/22 → 10/6/22

Funding

This research used resources of the Experimental Computing Laboratory (ExCL) at the Oak Ridge National Laboratory, and the material is based upon work supported by the US Department of Energy (DOE) Office of Science, Office of Advanced Scientific Computing Research under Contract No. DE-AC05-00OR22725. This research was supported in part by the DOE Advanced Scientific Computing Research Program Sawtooth Project and the Laboratory Directed Research and Development Program of Oak Ridge National Laboratory, managed by UT-Battelle LLC for DOE.

Keywords

High-Performance Computing
Processing in Memory

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1145/3565053.3565054

Cite this

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title = "Evaluating HPC Kernels for Processing in Memory",

abstract = "Memory subsystems contribute significantly to the performance and energy efficiency of high-performance computing (HPC) applications. Traditional memory technologies with conventional organization (e.g., DRAM) are struggling to keep up with the increasing memory requirements of modern applications. Techniques such as multilayer cache hierarchy and out-of-order execution are still falling short of mitigating the penalty incurred by memory accesses. Processing-in-memory (PIM), which involves moving memory-intensive kernels to memory for execution instead of bringing the data to the processing unit, is emerging as a promising technique. PIM has recently received traction among computer architecture researchers, and the increasing research activity surrounding this technique indicates its potential to alleviate main memory performance bottlenecks. In this paper, we characterize and identify memory-intensive HPC kernels, perform a first-order evaluation of the PIM technique for selected HPC kernels, quantify performance deviation, and analyze the key factors that affect PIM efficiency.",

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Asifuzzaman, K , Monil, MAH, Liu, F & Vetter, JS 2022, Evaluating HPC Kernels for Processing in Memory. in MEMSYS 2022 - Proceedings of the International Symposium on Memory Systems., 1, ACM International Conference Proceeding Series, Association for Computing Machinery, 2022 International Symposium on Memory Systems, MEMSYS 2022, Washington, United States, 10/3/22. https://doi.org/10.1145/3565053.3565054

Evaluating HPC Kernels for Processing in Memory. / Asifuzzaman, Kazi ; Monil, Mohammad Alaul Haque; Liu, Frank et al.
MEMSYS 2022 - Proceedings of the International Symposium on Memory Systems. Association for Computing Machinery, 2022. 1 (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Evaluating HPC Kernels for Processing in Memory

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AU - Monil, Mohammad Alaul Haque

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AU - Vetter, Jeffrey S.

PY - 2022/10/3

Y1 - 2022/10/3

N2 - Memory subsystems contribute significantly to the performance and energy efficiency of high-performance computing (HPC) applications. Traditional memory technologies with conventional organization (e.g., DRAM) are struggling to keep up with the increasing memory requirements of modern applications. Techniques such as multilayer cache hierarchy and out-of-order execution are still falling short of mitigating the penalty incurred by memory accesses. Processing-in-memory (PIM), which involves moving memory-intensive kernels to memory for execution instead of bringing the data to the processing unit, is emerging as a promising technique. PIM has recently received traction among computer architecture researchers, and the increasing research activity surrounding this technique indicates its potential to alleviate main memory performance bottlenecks. In this paper, we characterize and identify memory-intensive HPC kernels, perform a first-order evaluation of the PIM technique for selected HPC kernels, quantify performance deviation, and analyze the key factors that affect PIM efficiency.

AB - Memory subsystems contribute significantly to the performance and energy efficiency of high-performance computing (HPC) applications. Traditional memory technologies with conventional organization (e.g., DRAM) are struggling to keep up with the increasing memory requirements of modern applications. Techniques such as multilayer cache hierarchy and out-of-order execution are still falling short of mitigating the penalty incurred by memory accesses. Processing-in-memory (PIM), which involves moving memory-intensive kernels to memory for execution instead of bringing the data to the processing unit, is emerging as a promising technique. PIM has recently received traction among computer architecture researchers, and the increasing research activity surrounding this technique indicates its potential to alleviate main memory performance bottlenecks. In this paper, we characterize and identify memory-intensive HPC kernels, perform a first-order evaluation of the PIM technique for selected HPC kernels, quantify performance deviation, and analyze the key factors that affect PIM efficiency.

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KW - Processing in Memory

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Evaluating HPC Kernels for Processing in Memory

Abstract

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Keywords

UN SDGs

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