Estimation, Minimization, and Validation of Commutation Loop Inductance for a 135-kW SiC EV Traction Inverter

With growing interests in low-inductance silicon carbide (SiC)-based power module packaging, it is vital to focus on system-level design aspects to facilitate easy integration of the modules and reap system-level benefits. To effectively utilize the low-inductance modules, busbar and interconnects should also be designed with low stray inductances. A holistic investigation of the flux path and flux cancellations in the module-busbar assembly, which can be treated as differentially coupled series inductors, is thus mandatory for a system-level design. This article presents a busbar design, which can be adopted to effectively integrate the CREE's low-inductance 1.2-/1.7-kV SiC power modules. This article also proposes a novel measurement technique to measure the inductance of the module-busbar assembly as a whole rather than deducing it from individual components. The inductance of the overall commutation loop of the inverter that encompasses the SiC power module, interconnects, and printed circuit board (PCB) busbar has been estimated using finite-element analysis (FEA). Insights gained from FEA provided the guidelines to decide the placement of the decoupling capacitors in the busbar to minimize the overall commutation loop inductance from 12.8 to 7.4 nH, which resulted in a significant reduction in the device voltage overshoot. The simulation results have been validated through measurements using an impedance analyzer (ZA) with less than 5% difference between the extracted loop inductance from FEA and measurements. The busbar design study and the measurement technique discussed in this article can be easily extended to other power module packages. Finally, the 135-kW inverter has been compared to a similar high-power inverter utilizing a laminated busbar to highlight the performance of the former.