Abstract
The emergence of ultra-low power multicore processors will open unprecedented opportunities for implementing sophisticated signal processing algorithms faster and within a much lower energy budget. In that context, the concept of "corner turning" has been, for many decades, at the heart of array beamforming via Fourier transforms. As widely reported in the open literature (both for sonars and radars), the computational sequence involving corner turning operations, i.e., the sequence: temporal Fourier transforms →data cube corner turning →spatial Fourier transforms, constitutes a major obstacle to achieving high-performance and lower power dissipation (by reducing the number memory accesses). To date, leading industry providers still include explicit corner turning stages in their computational flow architectures for multidimensional array processing. The primary innovation reported in this paper addresses the development of a computational scheme that avoids altogether the corner turning stage. We discuss its implementation on currently available IBM CELL multicore technology and provide initial timing results.
Original language | English |
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Pages (from-to) | 6457-6462 |
Number of pages | 6 |
Journal | Proceedings - European Conference on Noise Control |
State | Published - 2008 |
Event | 7th European Conference on Noise Control 2008, EURONOISE 2008 - Paris, France Duration: Jun 29 2008 → Jul 4 2008 |